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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dawinic,aw9523-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/awinic,aw9523-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
13 The Awinic AW9523/AW9523B I2C GPIO Expander featuring 16 multi-function
18 const: awinic,aw9523-pinctrl
23 '#gpio-cells':
26 include/dt-bindings/gpio/gpio.h
29 gpio-controller: true
[all …]
H A Dst,stm32-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/pinctrl/st,stm32-pinctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Alexandre TORGUE <alexandre.torgue@foss.st.com>
17 on-chip controllers onto these pads.
22 - st,stm32f429-pinctrl
23 - st,stm32f469-pinctrl
24 - st,stm32f746-pinctrl
25 - st,stm32f769-pinctrl
[all …]
H A Dcypress,cy8c95x0.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Patrick Rudolph <patrick.rudolph@9elements.com>
14 Pin function configuration is performed on a per-pin basis.
19 - cypress,cy8c9520
20 - cypress,cy8c9540
21 - cypress,cy8c9560
26 gpio-controller: true
28 '#gpio-cells':
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H A Dsemtech,sx1501q.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Neil Armstrong <neil.armstrong@linaro.org>
16 - semtech,sx1501q
17 - semtech,sx1502q
18 - semtech,sx1503q
19 - semtech,sx1504q
20 - semtech,sx1505q
21 - semtech,sx1506q
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/linux/arch/powerpc/include/asm/
H A Dxive-regs.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 * Each interrupt source has a 2-bit state machine called ESB
21 * needs to be re-triggered.
24 * manipulate the PQ bits. They must be used with an 8-bytes
41 * Load-after-store ordering
44 * load-after-store ordering. This is required to use StoreEOI.
46 #define XIVE_ESB_LD_ST_MO 0x40 /* Load-after-store ordering */
63 #define TM_NSR 0x0 /* + + - + */
64 #define TM_CPPR 0x1 /* - + - + */
65 #define TM_IPB 0x2 /* - + + + */
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/linux/arch/arm64/boot/dts/arm/
H A Dcorstone1000-mps3.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
8 /dts-v1/;
14 compatible = "arm,corstone1000-mps3";
19 phy-mode = "mii";
21 reg-io-width = <2>;
22 smsc,irq-push-pull;
26 compatible = "nxp,usb-isp1763";
29 bus-width = <16>;
/linux/arch/arm/boot/dts/arm/
H A Darm-realview-eb-bbrevd.dtsi25 veth: regulator-veth {
26 compatible = "regulator-fixed";
27 regulator-name = "veth";
28 regulator-min-microvolt = <3300000>;
29 regulator-max-microvolt = <3300000>;
30 regulator-boot-on;
40 phy-mode = "mii";
41 smsc,irq-active-high;
42 smsc,irq-push-pull;
43 vdd33a-supply = <&veth>;
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/linux/arch/arm/boot/dts/qcom/
H A Dqcom-apq8060-dragonboard.dts1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/leds/common.h>
5 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
6 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
7 #include "qcom-msm8660.dtsi"
12 compatible = "qcom,apq8060-dragonboard", "qcom,msm8660";
19 stdout-path = "serial0:115200n8";
23 vph: regulator-fixed {
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/linux/Documentation/devicetree/bindings/iio/imu/
H A Dbosch,smi330.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Bosch SMI330 6-Axis IMU
10 - Stefan Gutmann <stefam.gutmann@de.bosch.com>
13 SMI330 is a 6-axis inertial measurement unit that supports acceleration and
15 events information such as motion, no-motion and tilt detection.
24 vdd-supply:
27 vddio-supply:
34 interrupt-names:
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/linux/Documentation/devicetree/bindings/iio/pressure/
H A Dfsl,mpl3115.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Antoni Pokusinski <apokusinski01@gmail.com>
16 https://www.nxp.com/docs/en/data-sheet/MPL3115A2.pdf
25 vdd-supply: true
27 vddio-supply: true
33 interrupt-names:
38 - INT1
39 - INT2
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/linux/drivers/watchdog/
H A Daspeed_wdt.c1 // SPDX-License-Identifier: GPL-2.0-or-later
53 .compatible = "aspeed,ast2400-scu",
65 .compatible = "aspeed,ast2500-scu",
78 .compatible = "aspeed,ast2600-scu",
91 .compatible = "aspeed,ast2700-scu0",
100 { .compatible = "aspeed,ast2400-wdt", .data = &ast2400_config },
101 { .compatible = "aspeed,ast2500-wdt", .data = &ast2500_config },
102 { .compatible = "aspeed,ast2600-wdt", .data = &ast2600_config },
103 { .compatible = "aspeed,ast2700-wdt", .data = &ast2700_config },
134 * * Drive mode: push-pull vs open-drain
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/linux/include/sound/sof/
H A Dtopology.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
53 /* create new generic component - SOF_IPC_TPLG_COMP_NEW */
95 /* create new component buffer - SOF_IPC_TPLG_BUFFER_NEW */
104 /* generic component config data - must always be after struct sof_ipc_comp */
122 uint32_t no_irq; /**< don't send periodic IRQ to host/DSP */
132 uint32_t type; /**< DAI type - SOF_DAI_ */
187 uint32_t operation_mode; /**< push 0, pull 1, In push mode the */
191 /**< In pull mode the ASRC outputs */
271 /* new pipeline - SOF_IPC_TPLG_PIPE_NEW */
286 /* pipeline construction complete - SOF_IPC_TPLG_PIPE_COMPLETE */
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/linux/arch/arm/boot/dts/samsung/
H A Dexynos5410-smdk5410.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/irq.h>
27 stdout-path = "serial2:115200n8";
31 compatible = "fixed-clock";
32 clock-frequency = <24000000>;
33 clock-output-names = "fin_pll";
34 #clock-cells = <0>;
37 pmic_ap_clk: pmic-ap-clk {
39 compatible = "fixed-clock";
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx31-lite.dts1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright (C) 2016-2018 Vladimir Zapolskiy <vz@mleia.com>
5 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
14 compatible = "logicpd,imx31-lite", "fsl,imx31";
17 stdout-path = &uart1;
26 compatible = "gpio-leds";
43 nand-bus-width = <8>;
44 nand-ecc-mode = "hw";
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/linux/Documentation/admin-guide/hw-vuln/
H A Dcore-scheduling.rst1 .. SPDX-License-Identifier: GPL-2.0
15 ----------------
16 A cross-HT attack involves the attacker and victim running on different Hyper
18 full mitigation of cross-HT attacks is to disable Hyper Threading (HT). Core
19 scheduling is a scheduler feature that can mitigate some (not all) cross-HT
21 user-designated trusted group can share a core. This increase in core sharing
27 core involves additional overhead - especially when the system is lightly
29 scheduling to perform more poorly compared to SMT-disabled, where N_CPUS is the
33 -----
35 Using this feature, userspace defines groups of tasks that can be co-scheduled
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/linux/Documentation/devicetree/bindings/sound/
H A Dcs35l36.txt5 - compatible : "cirrus,cs35l36"
7 - reg : the I2C address of the device for I2C
9 - VA-supply, VP-supply : power supplies for the device,
13 - cirrus,boost-ctl-millivolt : Boost Voltage Value. Configures the boost
18 - cirrus,boost-peak-milliamp : Boost-converter peak current limit in mA.
24 - cirrus,boost-ind-nanohenry : Inductor estimation LBST reference value.
32 - cirrus,multi-amp-mode : Boolean to determine if there are more than
33 one amplifier in the system. If more than one it is best to Hi-Z the ASP
36 - cirrus,boost-ctl-select : Boost converter control source selection.
39 0x00 - Control Port Value
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/linux/drivers/pinctrl/qcom/
H A Dpinctrl-spmi-gpio.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2012-2014, 2016-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
20 #include <linux/pinctrl/pinconf-generic.h>
24 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
27 #include "../pinctrl-utils.h"
102 * Output type - indicates pin should be configured as push-pull,
142 * struct pmic_gpio_pad - keep current GPIO settings
146 * @have_buffer: Set to true if GPIO output could be configured in push-pull,
147 * open-drain or open-source mode.
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/linux/arch/arm/boot/dts/st/
H A Dstm32746g-eval.dts2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include "stm32f746-pinctrl.dtsi"
46 #include <dt-bindings/input/input.h>
47 #include <dt-bindings/interrupt-controller/irq.h>
50 model = "STMicroelectronics STM32746g-EVAL board";
51 compatible = "st,stm32746g-eval", "st,stm32f746";
55 stdout-path = "serial0:115200n8";
68 compatible = "gpio-leds";
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/linux/drivers/soc/fsl/dpio/
H A Dqbman-portal.c1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
4 * Copyright 2016-2019 NXP
12 #include <soc/fsl/dpaa2-global.h>
14 #include "qbman-portal.h"
54 /* CENA register offsets in memory-backed mode */
178 return readl_relaxed(p->addr_cinh + offset); in qbman_read_register()
184 writel_relaxed(value, p->addr_cinh + offset); in qbman_write_register()
189 return p->addr_cena + offset; in qbman_get_cmd()
234 return last - first; in qm_cyc_diff()
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/linux/drivers/iio/imu/bmi160/
H A Dbmi160_core.c1 // SPDX-License-Identifier: GPL-2.0
3 * BMI160 - Bosch IMU (accel, gyro plus external magnetometer)
15 #include <linux/irq.h>
155 u8 data; /* LSB byte register for X-axis */
280 return &data->orientation; in bmi160_get_mount_matrix()
306 return -EINVAL; in bmi160_to_sensor()
322 ret = regmap_write(data->regmap, BMI160_REG_CMD, cmd); in bmi160_set_mode()
342 return -EINVAL; in bmi160_set_scale()
344 return regmap_write(data->regmap, bmi160_regs[t].range, in bmi160_set_scale()
354 ret = regmap_read(data->regmap, bmi160_regs[t].range, &val); in bmi160_get_scale()
[all …]
/linux/drivers/gpio/
H A Dgpio-virtuser.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2023-2024 Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
39 #include "dev-sync-probe.h"
63 atomic_t irq; member
99 init_completion(&ctx->work_completion); in gpio_virtuser_init_irq_work_context()
105 irq_work_queue(&ctx->wor in gpio_virtuser_irq_work_queue_sync()
666 gpio_virtuser_irq_handler(int irq,void * data) gpio_virtuser_irq_handler() argument
678 int irq, ret; gpio_virtuser_interrupts_set() local
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H A Dgpio-max732x.c1 // SPDX-License-Identifier: GPL-2.0-only
26 * - Push Pull Output
27 * - Input
28 * - Open Drain I/O
37 * - Group A : by I2C address 0b'110xxxx
38 * - Group B : by I2C address 0b'101xxxx
52 * NOTE: MAX7328/MAX7329 are drop-in replacements for PCF8574/a, so
57 #define PORT_OUTPUT 0x1 /* 'O' Push-Pull, Output Only */
59 #define PORT_OPENDRAIN 0x3 /* 'P' Open-Drain, I/O */
159 client = group_a ? chip->client_group_a : chip->client_group_b; in max732x_writeb()
[all …]
/linux/Documentation/devicetree/bindings/iio/adc/
H A Dmicrochip,mcp3564.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marius Cristea <marius.cristea@microchip.com>
13 Bindings for the Microchip family of 153.6 ksps, Low-Noise 16/24-Bit
14 Delta-Sigma ADCs with an SPI interface. Datasheet can be found here:
16 …s/aemDocuments/documents/MSLD/ProductDocuments/DataSheets/MCP3561-2-4-Family-Data-Sheet-DS20006181…
18 …ds/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP3561_2_4R-Data-Sheet-DS200006391C.pdf
20 …ProductDocuments/DataSheets/MCP3461-2-4-Two-Four-Eight-Channel-153.6-ksps-Low-Noise-16-Bit-Delta-S…
22 …/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP3461-2-4R-Family-Data-Sheet-DS20006404…
[all …]
/linux/kernel/sched/
H A Drt.c1 // SPDX-License-Identifier: GPL-2.0
3 * Real-Time Scheduling Class (mapped to the SCHED_FIFO and SCHED_RR
15 * period over which we measure -rt task CPU usage in us.
73 array = &rt_rq->active; in init_rt_rq()
75 INIT_LIST_HEAD(array->queue + i); in init_rt_rq()
76 __clear_bit(i, array->bitmap); in init_rt_rq()
79 __set_bit(MAX_RT_PRIO, array->bitmap); in init_rt_rq()
81 rt_rq->highest_prio.curr = MAX_RT_PRIO-1; in init_rt_rq()
82 rt_rq->highest_prio.next = MAX_RT_PRIO-1; in init_rt_rq()
83 rt_rq->overloaded = 0; in init_rt_rq()
[all …]
/linux/arch/arm/boot/dts/renesas/
H A Dsh73a0-kzm9g.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the KZM-A9-GT board
7 * Based on sh73a0-kzm9g.dts
11 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
18 model = "KZM-A9-GT";
27 cpu0-supply = <&vdd_dvfs>;
28 operating-points = <1196000 1315000>, /* kHz uV */
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