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/linux/include/linux/
H A Dlis3lv02d.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * struct lis3lv02d_platform_data - lis3 chip family platform data
14 * @irq_cfg: On chip irq source and type configuration (click /
15 * data available / wake up, open drain, polarity)
16 * @irq_flags1: Additional irq triggering flags for irq channel 0
17 * @irq_flags2: Additional irq triggering flags for irq channel 1
18 * @duration1: Wake up unit 1 duration parameter
19 * @duration2: Wake up unit 2 duration parameter
20 * @wakeup_flags: Wake up unit 1 flags
21 * @wakeup_thresh: Wake up unit 1 threshold value
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/linux/Documentation/devicetree/bindings/input/
H A Dgpio-keys.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/input/gpio-keys.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
15 - gpio-keys
16 - gpio-keys-polled
23 poll-interval: true
26 …"^(button|event|key|switch|(button|event|key|switch)-[a-z0-9-]+|[a-z0-9-]+-(button|event|key|switc…
35 - items:
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/linux/Documentation/power/
H A Dsuspend-and-interrupts.rst10 -----------------------------------
14 ->prepare, ->suspend and ->suspend_late callbacks have been executed for all
29 Device IRQs are re-enabled during system resume, right before the "early" phase
30 of resuming devices (that is, before starting to execute ->resume_early
35 ------------------------
37 There are interrupts that can legitimately trigger during the entire system
38 suspend-resume cycle, including the "noirq" phases of suspending and resuming
41 but also to IPIs and to some other special-purpose interrupts.
43 The IRQF_NO_SUSPEND flag is used to indicate that to the IRQ subsystem when
44 requesting a special-purpose interrupt. It causes suspend_device_irqs() to
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/linux/drivers/hid/intel-thc-hid/intel-thc/
H A Dintel-thc-wot.c1 // SPDX-License-Identifier: GPL-2.0
7 #include "intel-thc-dev.h"
8 #include "intel-thc-wot.h"
11 * thc_wot_config - Query and configure wake-on-touch feature
16 * _DSD to map this GPIO resource, so this function first registers wake GPIO
17 * mapping manually, then queries wake-on-touch GPIO resource from ACPI,
18 * if it exists and is wake-able, configure driver to enable it, otherwise,
31 adev = ACPI_COMPANION(thc_dev->dev); in thc_wot_config()
35 wot = &thc_dev->wot; in thc_wot_config()
39 dev_warn(thc_dev->dev, "Can't add wake GPIO resource, ret = %d\n", ret); in thc_wot_config()
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/linux/drivers/net/ethernet/apple/
H A Dmace.c1 // SPDX-License-Identifier: GPL-2.0-only
29 static int port_aaui = -1;
85 static irqreturn_t mace_interrupt(int irq, void *dev_id);
86 static irqreturn_t mace_txdma_intr(int irq, void *dev_id);
87 static irqreturn_t mace_rxdma_intr(int irq, void *dev_id);
95 * If we can't get a skbuff when we need it, we use this area for DMA.
115 int j, rev, rc = -EBUSY; in mace_probe()
118 printk(KERN_ERR "can't use MACE %pOF: need 3 addrs and 3 irqs\n", in mace_probe()
120 return -ENODEV; in mace_probe()
123 addr = of_get_property(mace, "mac-address", NULL); in mace_probe()
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/linux/Documentation/devicetree/bindings/net/
H A Dbtusb.txt2 ---------------------------------------------------
6 - compatible : should comply with the format "usbVID,PID" specified in
7 Documentation/devicetree/bindings/usb/usb-device.yaml
13 "usb4ca,301a" (Qualcomm QCA6174A (Lite-On))
17 Documentation/devicetree/bindings/net/marvell-bt-8xxx.txt
21 - interrupt-names: (see below)
22 - interrupts : The interrupt specified by the name "wakeup" is the interrupt
23 that shall be used for out-of-band wake-on-bt. Driver will
25 irq will be enabled so that the bluetooth chip can wakeup host
26 platform out of band. During system resume, the irq will be
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/linux/drivers/char/tpm/
H A Dtpm_tis_spi_cr50.c1 // SPDX-License-Identifier: GPL-2.0
23 * - can go to sleep not earlier than after CR50_SLEEP_DELAY_MSEC.
24 * - needs up to CR50_WAKE_START_DELAY_USEC to wake after sleep.
25 * - requires waiting for "ready" IRQ, if supported; or waiting for at least
26 * CR50_NOIRQ_ACCESS_DELAY_MSEC between transactions, if IRQ is not supported.
27 * - waits for up to CR50_FLOW_CONTROL for flow control 'ready' indication.
69 cr50_phy->irq_confirmed = true; in cr50_spi_irq_handler()
70 complete(&cr50_phy->spi_phy.ready); in cr50_spi_irq_handler()
81 unsigned long allowed_access = phy->last_access + phy->access_delay; in cr50_ensure_access_delay()
83 struct device *dev = &phy->spi_phy.spi_device->dev; in cr50_ensure_access_delay()
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/linux/drivers/gpu/drm/xe/
H A Dxe_hw_engine_types.h1 /* SPDX-License-Identifier: MIT */
69 * struct xe_hw_engine_class_intf - per hw engine class struct interface
88 /** @sched_props.timeslice_us: timeslice period in micro-seconds */
90 /** @sched_props.timeslice_min: min timeslice period in micro-seconds */
92 /** @sched_props.timeslice_max: max timeslice period in micro-seconds */
94 /** @sched_props.preempt_timeout_us: preemption timeout in micro-seconds */
96 /** @sched_props.preempt_timeout_min: min preemption timeout in micro-seconds */
98 /** @sched_props.preempt_timeout_max: max preemption timeout in micro-seconds */
104 * struct xe_hw_engine - Hardware engine
119 /** @irq_offset: IRQ offset of this hw engine */
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/linux/arch/arm/mach-omap2/
H A Dprm3xxx.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010-2012 Texas Instruments, Inc.
16 #include <linux/irq.h>
26 #include "prm-regbits-34xx.h"
28 #include "cm-regbits-34xx.h"
48 .irq = 11 + OMAP_INTC_START,
57 * omap3_prm_reset_src_map - map from bits in the PRM_RSTST hardware
59 * bit shifts (which is an OMAP SoC-independent enumeration)
74 { -1, -1 },
80 * struct omap3_vp - OMAP3 VP register access description.
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/linux/Documentation/devicetree/bindings/iio/accel/
H A Dlis302.txt8 - compatible: should be set to "st,lis3lv02d-spi"
9 - reg: the chipselect index
10 - spi-max-frequency: maximal bus speed, should be set to 1000000 unless
12 - interrupts: the interrupt generated by the device
15 - compatible: should be set to "st,lis3lv02d"
16 - reg: i2c slave address
17 - Vdd-supply: The input supply for Vdd
18 - Vdd_IO-supply: The input supply for Vdd_IO
23 - st,click-single-{x,y,z}: if present, tells the device to issue an
26 - st,click-double-{x,y,z}: if present, tells the device to issue an
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/linux/sound/ppc/
H A Dpmac.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <asm/irq.h>
17 #include <linux/dma-mapping.h>
54 rec->space = dma_alloc_coherent(&chip->pdev->de in snd_pmac_dbdma_alloc()
745 snd_pmac_tx_intr(int irq,void * devid) snd_pmac_tx_intr() argument
754 snd_pmac_rx_intr(int irq,void * devid) snd_pmac_rx_intr() argument
763 snd_pmac_ctrl_intr(int irq,void * devid) snd_pmac_ctrl_intr() argument
1138 unsigned int irq; snd_pmac_new() local
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/linux/arch/x86/kvm/vmx/
H A Dposted_intr.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include "irq.h"
18 * Maintain a per-CPU list of vCPUs that need to be awakened by wakeup_handler()
23 * wake the target vCPUs. vCPUs are removed from the list and the notification
28 * Protect the per-CPU list with a per-CPU spinlock to handle task migration.
30 * ->sched_in() path will need to take the vCPU off the list of the _previous_
32 * occur if a wakeup IRQ arrives and attempts to acquire the lock.
40 return &(to_vt(vcpu)->pi_desc); in vcpu_to_pi_desc()
46 * PID.ON can be set at any time by a different vCPU or by hardware, in pi_try_set_control()
51 if (!try_cmpxchg64(&pi_desc->control, pold, new)) in pi_try_set_control()
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/linux/kernel/irq/
H A Dmanage.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
4 * Copyright (C) 2005-2006 Thomas Gleixner
6 * This file contains driver APIs to the irq subsystem.
11 #include <linux/irq.h>
50 while (irqd_irq_inprogress(&desc->irq_data)) in __synchronize_hardirq()
53 /* Ok, that indicated we're done: double-check carefully. */ in __synchronize_hardirq()
54 guard(raw_spinlock_irqsave)(&desc->lock); in __synchronize_hardirq()
55 inprogress = irqd_irq_inprogress(&desc->irq_data); in __synchronize_hardirq()
75 * synchronize_hardirq - wait for pending hard IRQ handlers (on other CPUs)
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H A Dhandle.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
4 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
7 * information is available in Documentation/core-api/genericirq.rst
11 #include <linux/irq.h>
19 #include <trace/events/irq.h>
28 * handle_bad_irq - handle spurious and unhandled irqs
31 * Handles spurious and unhandled IRQ's. It also prints a debugmessage.
35 unsigned int irq = irq_desc_get_irq(desc); in handle_bad_irq() local
37 print_irq_desc(irq, desc); in handle_bad_irq()
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/linux/drivers/net/wwan/iosm/
H A Diosm_ipc_pm.h1 /* SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2020-21 Intel Corporation.
18 * union ipc_pm_cond - Conditions for D3 and the sleep message to CP.
20 * @irq: IRQ towards CP
28 unsigned int irq:1, member
35 * enum ipc_mem_host_pm_state - Possible states of the HOST SLEEP finite state
59 * enum ipc_mem_dev_pm_state - Possible states of the DEVICE SLEEP finite state
63 * IRQ(struct ipc_mem_device_info:
65 * and DOORBELL-IRQ-HPDA(data) values.
68 * @IPC_MEM_DEV_PM_WAKEUP: DOORBELL-IRQ-DEVICE_WAKE(data).
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/linux/drivers/rtc/
H A Drtc-sc27xx.c1 // SPDX-License-Identifier: GPL-2.0
108 int irq; member
117 * auxiliary alarm event can wake up system from deep sleep, but only alarm
118 * event can power up system from power down status.
128 return regmap_write(rtc->regmap, rtc->base + SPRD_RTC_INT_CLR, in sprd_rtc_clear_alarm_ints()
137 ret = regmap_read(rtc->regmap, rtc->base + SPRD_RTC_SPG_VALUE, &val); in sprd_rtc_lock_alarm()
147 ret = regmap_write(rtc->regmap, rtc->base + SPRD_RTC_SPG_UPD, val); in sprd_rtc_lock_alarm()
152 ret = regmap_read_poll_timeout(rtc->regmap, in sprd_rtc_lock_alarm()
153 rtc->base + SPRD_RTC_INT_RAW_STS, val, in sprd_rtc_lock_alarm()
158 dev_err(rtc->dev, "failed to update SPG value:%d\n", ret); in sprd_rtc_lock_alarm()
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H A Drtc-cmos.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
46 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
53 * If cleared, ACPI SCI is only used to wake up the system from suspend
76 int irq; member
100 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
112 /*----------------------------------------------------------------*/
115 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
117 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
121 * emulation of hardware RTC IRQ facilities using HPET #1. We don't
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/linux/Documentation/devicetree/bindings/rtc/
H A Dsophgo,cv1800b-rtc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/sophgo,cv1800b-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 contains a 32KHz oscillator and a Power-On-Reset (POR) sub-module, which can
14 power-on, power-off and reset.
17 powered. System software can use the 8051 to manage wake conditions and wake
22 https://github.com/sophgo/sophgo-doc/tree/main/SG200X/TRM
25 - sophgo@lists.linux.dev
28 - $ref: /schemas/rtc/rtc.yaml#
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/linux/drivers/irqchip/
H A Dirq-brcmstb-l2.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2014-2024 Broadcom
19 #include <linux/irq.h>
48 .cpu_clear = -1, /* Register not present */
68 unsigned int irq; in brcmstb_l2_intc_irq_handle() local
73 status = irq_reg_readl(b->gc, b->status_offset) & in brcmstb_l2_intc_irq_handle()
74 ~(irq_reg_readl(b->gc, b->mask_offset)); in brcmstb_l2_intc_irq_handle()
77 raw_spin_lock(&desc->lock); in brcmstb_l2_intc_irq_handle()
79 raw_spin_unlock(&desc->lock); in brcmstb_l2_intc_irq_handle()
84 irq = ffs(status) - 1; in brcmstb_l2_intc_irq_handle()
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H A Dirq-imgpdc.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright 2010-2013 Imagination Technologies Ltd.
7 * Exposes the syswake and PDC peripheral wake interrupts to the system.
66 * struct pdc_intc_priv - private pdc interrupt data.
69 * @perip_irqs: List of peripheral IRQ numbers handled.
70 * @syswake_irq: Shared PDC syswake IRQ number.
71 * @domain: IRQ domain for PDC peripheral and syswake IRQs.
92 iowrite32(data, priv->pdc_base + reg_offs); in pdc_write()
98 return ioread32(priv->pdc_base + reg_offs); in pdc_read()
101 /* Generic IRQ callbacks */
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/linux/drivers/platform/cznic/
H A Dturris-omnia-mcu.h1 /* SPDX-License-Identifier: GPL-2.0 */
30 * struct omnia_mcu - driver private data structure
43 * @cached: bitmap of cached IRQ line values (when an IRQ line is configured for
44 * both edges, we cache the corresponding GPIO values in the IRQ
46 * @is_cached: bitmap of which IRQ line values are cached
55 * @rtcdev: RTC device, does not actually count real-time, the device is only
56 * used for the RTC alarm mechanism, so that the board can be
57 * configured to wake up from poweroff state at a specific time
58 * @rtc_alarm: RTC alarm that was set for the board to wake up on, in MCU time
/linux/drivers/platform/goldfish/
H A Dgoldfish_pipe.c1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2011-2016 Google, Inc.
62 #include <linux/dma-mapping.h>
69 * can benefit from knowing it
84 /* A per-pipe command structure, shared with the host */
86 s32 cmd; /* PipeCmdCode, guest -> host */
87 s32 id; /* pipe id, guest -> host */
88 s32 status; /* command execution status, host -> guest */
89 s32 reserved; /* to pad to 64-bit boundary */
93 /* number of buffers, guest -> host */
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/linux/drivers/acpi/acpica/
H A Drsirq.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
4 * Module Name: rsirq - IRQ resource descriptors
25 /* Get the IRQ mask (bytes 1:2) */
27 {ACPI_RSC_BITMASK16, ACPI_RS_OFFSET(data.irq.interrupts[0]),
28 AML_OFFSET(irq.irq_mask),
29 ACPI_RS_OFFSET(data.irq.interrupt_count)},
33 {ACPI_RSC_SET8, ACPI_RS_OFFSET(data.irq.triggering),
37 /* Get the descriptor length (2 or 3 for IRQ descriptor) */
39 {ACPI_RSC_2BITFLAG, ACPI_RS_OFFSET(data.irq.descriptor_length),
40 AML_OFFSET(irq.descriptor_type),
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/linux/drivers/input/touchscreen/
H A Dpixcir_i2c_ts.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010-2011 Pixcir, Inc.
33 * clocks are cut and it can only be brought out of this mode
65 * struct pixcir_i2c_chip_data - chip related data
102 const struct pixcir_i2c_chip_data *chip = tsdata->chip; in pixcir_ts_parse()
106 i = chip->has_hw_ids ? 1 : 0; in pixcir_ts_parse()
107 readsize = 2 + tsdata->chip->max_fingers * (4 + i); in pixcir_ts_parse()
111 ret = i2c_master_send(tsdata->client, wrbuf, sizeof(wrbuf)); in pixcir_ts_parse()
113 dev_err(&tsdata->client->dev, in pixcir_ts_parse()
119 ret = i2c_master_recv(tsdata->client, rdbuf, readsize); in pixcir_ts_parse()
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/linux/arch/powerpc/platforms/powernv/
H A Dvas-fault.c1 // SPDX-License-Identifier: GPL-2.0+
21 * The maximum FIFO size for fault window can be 8MB
24 * 8MB FIFO can be used if expects more faults for each VAS
31 unsigned long *end = vinst->fault_fifo + vinst->fault_fifo_size; in dump_fifo()
35 pr_err("Fault fifo size %d, Max crbs %d\n", vinst->fault_fifo_size, in dump_fifo()
36 vinst->fault_fifo_size / CRB_SIZE); in dump_fifo()
54 * pswid - window ID of the window on which the request is sent.
55 * fault_storage_addr - fault address
57 * It can raise a single interrupt for multiple faults. Expects OS to
60 * credit mechanism. NX can continuously paste CRBs until credits are not
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