Home
last modified time | relevance | path

Searched +full:irq +full:- +full:active +full:- +full:high (Results 1 – 25 of 696) sorted by relevance

12345678910>>...28

/linux/drivers/iio/common/st_sensors/
H A Dst_sensors_trigger.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2012-2013 STMicroelectronics Inc.
19 * st_sensors_new_samples_available() - check if more samples came in
24 * false - no new samples available or read error
25 * true - new samples available
33 if (!sdata->sensor_settings->drdy_irq.stat_drdy.addr) in st_sensors_new_samples_available()
37 if (!indio_dev->active_scan_mask) in st_sensors_new_samples_available()
40 ret = regmap_read(sdata->regmap, in st_sensors_new_samples_available()
41 sdata->sensor_settings->drdy_irq.stat_drdy.addr, in st_sensors_new_samples_available()
44 dev_err(indio_dev->dev.parent, in st_sensors_new_samples_available()
[all …]
/linux/Documentation/driver-api/gpio/
H A Dconsumer.rst21 - Simple compile coverage with e.g. COMPILE_TEST - it does not matter that
25 - Truly optional GPIOLIB support - where the driver does not really make use
26 of the GPIOs on certain compile-time configurations for certain systems, but
27 will use it under other compile-time configurations. In this case the
35 All the functions that work with the descriptor-based GPIO interface are
45 With the descriptor-based interface, GPIOs are identified with an opaque,
46 non-forgeable handler that must be obtained through a call to one of the
62 see Documentation/driver-api/gpio/board.rst
78 whether the line is configured active high or active low (see
87 with IS_ERR() (they will never return a NULL pointer). -ENOENT will be returned
[all …]
H A Dintro.rst17 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
25 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
26 non-dedicated pin can be configured as a GPIO; and most chips have at least
31 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
36 - Output values are writable (high=1, low=0). Some chips also have
38 value might be driven, supporting "wire-OR" and similar schemes for the
41 - Input values are likewise readable (1, 0). Some chips support readback
42 of pins configured as "output", which is very useful in such "wire-OR"
44 input de-glitch/debounce logic, sometimes with software controls.
46 - Inputs can often be used as IRQ signals, often edge triggered but
[all …]
/linux/drivers/media/rc/
H A Dserial_ir.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * serial_ir - Device driver that records pulse- and pause-lengths
6 * (space-lengths) between DDCD event on a serial port.
8 * Copyright (C) 1996,97 Ralph Metzler <rjkm@thp.uni-koeln.de>
13 * Copyright (C) 2016 Sean Young <sean@mess.org> (port to rc-core)
28 #include <media/rc-core.h>
51 static int irq; variable
56 static int sense = -1; /* -1 = auto, 0 = active high, 1 = active low */
57 static bool txsense; /* 0 = active high, 1 = active low */
145 /* the register is memory-mapped */ in sinp()
[all …]
/linux/Documentation/devicetree/bindings/sound/
H A Dti,tlv320adcx140.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analog-to-Digital Converter
11 - Andrew Davis <afd@ti.com>
14 The TLV320ADCX140 are multichannel (4-ch analog recording or 8-ch digital
15 PDM microphones recording), high-performance audio, analog-to-digital
28 - ti,tlv320adc3140
29 - ti,tlv320adc5140
30 - ti,tlv320adc6140
[all …]
/linux/drivers/iio/adc/
H A Denvelope-detector.c1 // SPDX-License-Identifier: GPL-2.0
16 * input +------>-------|+ \
18 * .-------. | }---.
20 * | dac|-->--|- / |
24 * | irq|------<-------'
26 * '-------'
40 #include <linux/irq.h>
62 int high; member
72 * (one-bit memory) for if the interrupt has triggered since last calling
75 * need to service a possible interrupt flood from the comparator when no-one
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmicrochip,mcp23s08.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Himanshu Bhavani <himanshu.bhavani@siliconsignals.io>
17 - $ref: /schemas/spi/spi-peripheral-props.yaml#
22 - microchip,mcp23s08
23 - microchip,mcp23s17
24 - microchip,mcp23s18
25 - microchip,mcp23008
26 - microchip,mcp23017
[all …]
/linux/include/uapi/linux/
H A Dlp.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * usr/include/linux/lp.h c.1991-1992 James Wiegand
26 #define LP_CAREFUL 0x0080 /* obsoleted -arca */
38 #define LP_PBUSY 0x80 /* inverted input, active high */
39 #define LP_PACK 0x40 /* unchanged input, active low */
40 #define LP_POUTPA 0x20 /* unchanged input, active high */
41 #define LP_PSELECD 0x10 /* unchanged input, active high */
42 #define LP_PERRORP 0x08 /* unchanged input, active low */
44 /* timeout for each character. This is relative to bus cycles -- it
77 #define LPSETIRQ 0x0605 /* call with new IRQ number,
[all …]
/linux/arch/m68k/68000/
H A Ddragen2.c1 // SPDX-License-Identifier: GPL-2.0
53 /* PK3: hardware sleep function pin, active low */ in init_dragen2()
56 PKDATA |= PK(3); /* set pin high */ in init_dragen2()
58 /* PF5: hardware reset function pin, active high */ in init_dragen2()
68 /* INT1 enable (cs8900 IRQ) */ in init_dragen2()
69 PDPOL &= ~PD(1); /* active high signal */ in init_dragen2()
71 PDIRQEN |= PD(1); /* IRQ enabled */ in init_dragen2()
/linux/Documentation/devicetree/bindings/iio/adc/
H A Dadi,ad7606.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
14 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7605-4.pdf
15 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606_7606-6_7606-4.pdf
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7606B.pdf
17 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606c-16.pdf
18 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606c-18.pdf
19 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7607.pdf
[all …]
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-lg-x3.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/gpio-keys.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/mfd/max77620.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra30-cpu-opp.dtsi"
11 #include "tegra30-cpu-opp-microvolt.dtsi"
14 chassis-type = "handset";
30 * pre-existing /chosen node to be available to insert the
[all …]
/linux/drivers/char/mwave/
H A D3780i.h3 * 3780i.h -- declarations for 3780i.c
23 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
42 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
45 * 10/23/2000 - Alpha Release
61 #define DSP_MsaAddrHigh 0x0006 /* MSP System Address, high word */
62 #define DSP_MsaDataDSISHigh 0x0008 /* MSA data register: d-store word or high byte of i-stor…
63 #define DSP_MsaDataISLow 0x000A /* MSA data register: low word of i-store */
69 unsigned char SoftReset:1; /* RW: Soft reset 0=normal, 1=soft reset active */
96 unsigned char IrqActiveLow:1; /* RW: IRQ active high or low: 0=high, 1=low */
97 unsigned char IrqPulse:1; /* RW: IRQ pulse or level: 0=level, 1=pulse */
[all …]
/linux/arch/arm64/kvm/vgic/
H A Dvgic.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/irq.h>
26 * kvm->lock (mutex)
27 * vcpu->mutex (mutex)
28 * kvm->arch.config_lock (mutex)
29 * its->cmd_lock (mutex)
30 * its->its_lock (mutex)
31 * vgic_dist->lpi_xa.xa_lock
32 * vgic_cpu->ap_list_lock must be taken with IRQs disabled
33 * vgic_irq->irq_lock must be taken with IRQs disabled
[all …]
/linux/Documentation/devicetree/bindings/media/
H A Datmel-isi.txt2 ----------------------------------
5 - compatible: must be "atmel,at91sam9g45-isi" or "microchip,sam9x60-isi".
6 - reg: physical base address and length of the registers set for the device.
7 - interrupts: should contain IRQ line for the ISI.
8 - clocks: list of clock specifiers, corresponding to entries in the clock-names
9 property; please refer to clock-bindings.txt.
10 - clock-names: required elements: "isi_clk".
11 - pinctrl-names, pinctrl-0: please refer to pinctrl-bindings.txt.
15 defined in Documentation/devicetree/bindings/media/video-interfaces.txt.
18 ------------------------
[all …]
/linux/arch/mips/include/asm/sgi/
H A Dhpc3.h26 #define HPCDMA_XIE 0x20000000 /* irq generated when at end of this desc */
40 u32 _unused0[0x1000/4 - 2]; /* padding */
46 #define HPC3_PDMACTRL_ISACT 0x00000002 /* channel active */
54 #define HPC3_PDMACTRL_HW 0x0000ff00 /* DMA High-water mark */
58 u32 _unused1[0x1000/4 - 1]; /* padding */
65 u32 _unused0[0x1000/4 - 2]; /* padding */
68 #define HPC3_SBCD_XIE 0x00004000 /* Send IRQ when done with cur buf */
72 #define HPC3_SCTRL_IRQ 0x01 /* IRQ asserted, either dma done or parity */
76 #define HPC3_SCTRL_ACTIVE 0x10 /* SCSI DMA channel is active */
77 #define HPC3_SCTRL_AMASK 0x20 /* DMA active inhibits PIO */
[all …]
/linux/Documentation/devicetree/bindings/regulator/
H A Drichtek,rtmv20-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/richtek,rtmv20-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
27 wakeup-source: true
32 enable-gpios:
36 richtek,ld-pulse-delay-us:
38 load current pulse delay in microsecond after strobe pin pulse high.
43 richtek,ld-pulse-width-us:
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6q-apalis-ixora-v1.2.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2014-2022 Toradex
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
14 #include "imx6qdl-apalis.dtsi"
18 compatible = "toradex,apalis_imx6q-ixora-v1.2", "toradex,apalis_imx6q",
30 stdout-path = "serial0:115200n8";
34 compatible = "gpio-leds";
[all …]
/linux/drivers/usb/isp1760/
H A Disp1760-core.h1 /* SPDX-License-Identifier: GPL-2.0 */
21 #include "isp1760-hcd.h"
22 #include "isp1760-udc.h"
32 #define ISP1760_FLAG_BUS_WIDTH_16 0x00000002 /* 16-bit data bus width */
35 #define ISP1760_FLAG_DACK_POL_HIGH 0x00000010 /* DACK active high */
36 #define ISP1760_FLAG_DREQ_POL_HIGH 0x00000020 /* DREQ active high */
38 #define ISP1760_FLAG_INTR_POL_HIGH 0x00000080 /* Interrupt polarity active high */
41 #define ISP1760_FLAG_BUS_WIDTH_8 0x00000400 /* 8-bit data bus width */
53 int isp1760_register(struct resource *mem, int irq, unsigned long irqflags,
/linux/arch/powerpc/boot/dts/fsl/
H A Dp1023rdb.dts4 * Copyright 2013 - 2014 Freescale Semiconductor Inc.
37 /include/ "p1023si-pre.dtsi"
42 #address-cells = <2>;
43 #size-cells = <2>;
44 interrupt-parent = <&mpic>;
50 reserved-memory {
51 #address-cells = <2>;
52 #size-cells = <2>;
55 bman_fbpr: bman-fbpr {
59 qman_fqd: qman-fqd {
[all …]
H A Dp1010rdb-pb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /include/ "p1010si-pre.dtsi"
11 model = "fsl,P1010RDB-PB";
12 compatible = "fsl,P1010RDB-PB";
31 /include/ "p1010si-post.dtsi"
35 interrupt-map = <
38 *irq[4:5] are active-high
39 *irq[6:7] are active-low
/linux/include/linux/
H A Dlp.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * usr/include/linux/lp.h c.1991-1992 James Wiegand
16 /* Magic numbers for defining port-device mappings */
17 #define LP_PARPORT_UNSPEC -4
18 #define LP_PARPORT_AUTO -3
19 #define LP_PARPORT_OFF -2
20 #define LP_PARPORT_NONE -1
26 #define LP_IRQ(minor) lp_table[(minor)].dev->port->irq /* interrupt # */
33 #define LP_BASE(x) lp_table[(x)].dev->port->base
71 * signals are active low. An example is LP_STROBE, which must be programmed
[all …]
/linux/drivers/comedi/drivers/
H A Dpcmuio.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Comedi driver for Winsystems PC-104 based 48/96-channel DIO boards.
6 * COMEDI - Linux Control and Measurement Device Interface
12 * Description: Winsystems PC-104 based 48/96-channel DIO boards.
13 * Devices: [Winsystems] PCM-UIO48A (pcmuio48), PCM-UIO96A (pcmuio96)
15 * Updated: Fri, 13 Jan 2006 12:01:01 -0500
18 * A driver for the relatively straightforward-to-program PCM-UIO48A and
19 * PCM-UIO96A boards from Winsystems. These boards use either one or two
20 * (in the 96-DIO version) WS16C48 ASIC HighDensity I/O Chips (HDIO). This
22 * for INPUT or OUTPUT (thus comedi_dio_config can be done on a per-channel
[all …]
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dimg,pdc-intc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/img,pdc-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - James Hogan <jhogan@kernel.org>
19 const: img,pdc-intc
24 interrupt-controller: true
26 '#interrupt-cells':
28 <1st-cell>: The interrupt-number that identifies the interrupt source.
29 0-7: Peripheral interrupts
[all …]
/linux/drivers/irqchip/
H A Dqcom-pdc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
9 #include <linux/irq.h>
18 #include <linux/soc/qcom/irq.h>
47 #define pin_to_hwirq(r, p) ((r)->parent_base + (p) - (r)->pin_base)
79 /* Use previous DRV (client) region and shift to bank 3-4 */ in pdc_x1e_irq_enable_write()
84 /* Use our own region and shift to bank 0-2 */ in pdc_x1e_irq_enable_write()
86 bank -= 2; in pdc_x1e_irq_enable_write()
129 __pdc_enable_intr(d->hwirq, on); in pdc_enable_intr()
146 * GIC does not handle falling edge or active low. To allow falling edge and
[all …]
/linux/drivers/video/fbdev/omap2/omapfb/dss/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
27 bool "Collect DSS IRQ statistics"
30 Collect DSS IRQ statistics, printable via debugfs.
46 OMAP Video Encoder support for S-Video and composite TV-out.
62 HDMI Interface for OMAP5 and similar cores. This adds the High
71 SDI is a high speed one-way display serial bus between the host
79 DSI is a high speed half-duplex serial interface between the host
97 2xPCK (if active matrix) or 3xPCK (if passive matrix).
100 is very high.

12345678910>>...28