Searched +full:iproc +full:- +full:rng200 (Results 1 – 16 of 16) sorted by relevance
| /linux/Documentation/devicetree/bindings/rng/ |
| H A D | brcm,iproc-rng200.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/rng/brcm,iproc-rng200.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: HWRNG support for the iproc-rng200 driver 10 - Florian Fainelli <f.fainelli@gmail.com> 15 - brcm,bcm2711-rng200 16 - brcm,bcm7211-rng200 17 - brcm,bcm7278-rng200 18 - brcm,iproc-rng200 [all …]
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| /linux/drivers/char/hw_random/ |
| H A D | iproc-rng200.c | 1 // SPDX-License-Identifier: GPL-2.0-only 7 * DESCRIPTION: The Broadcom iProc RNG200 Driver 106 status = ioread32(priv->base + RNG_INT_STATUS_OFFSET); in iproc_rng200_read() 111 return max - num_remaining; in iproc_rng200_read() 113 iproc_rng200_restart(priv->base); in iproc_rng200_read() 118 if ((ioread32(priv->base + RNG_FIFO_COUNT_OFFSET) & in iproc_rng200_read() 123 *(uint32_t *)buf = ioread32(priv->base + in iproc_rng200_read() 126 num_remaining -= sizeof(uint32_t); in iproc_rng200_read() 129 uint32_t rnd_number = ioread32(priv->base + in iproc_rng200_read() 141 return max - num_remaining; in iproc_rng200_read() [all …]
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| H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 6 obj-$(CONFIG_HW_RANDOM) += rng-core.o 7 rng-core-y := core.o 8 obj-$(CONFIG_HW_RANDOM_TIMERIOMEM) += timeriomem-rng.o 9 obj-$(CONFIG_HW_RANDOM_INTEL) += intel-rng.o 10 obj-$(CONFIG_HW_RANDOM_AMD) += amd-rng.o 11 obj-$(CONFIG_HW_RANDOM_AIROHA) += airoha-trng.o 12 obj-$(CONFIG_HW_RANDOM_ATMEL) += atmel-rng.o 13 obj-$(CONFIG_HW_RANDOM_BA431) += ba431-rng.o 14 obj-$(CONFIG_HW_RANDOM_GEODE) += geode-rng.o [all …]
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| /linux/arch/arm/boot/dts/broadcom/ |
| H A D | bcm-cygnus.dtsi | 33 #include <dt-bindings/interrupt-controller/arm-gic.h> 34 #include <dt-bindings/interrupt-controller/irq.h> 35 #include <dt-bindings/clock/bcm-cygnus.h> 38 #address-cells = <1>; 39 #size-cells = <1>; 42 interrupt-parent = <&gic>; 54 #address-cells = <1>; 55 #size-cells = <0>; 59 compatible = "arm,cortex-a9"; 60 next-level-cache = <&L2>; [all …]
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| H A D | bcm63148.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/interrupt-controller/irq.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 14 interrupt-parent = <&gic>; 17 #address-cells = <1>; 18 #size-cells = <0>; 22 compatible = "brcm,brahma-b15"; 24 next-level-cache = <&L2_0>; [all …]
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| H A D | bcm63178.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/interrupt-controller/irq.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 14 interrupt-parent = <&gic>; 17 #address-cells = <1>; 18 #size-cells = <0>; 22 compatible = "arm,cortex-a7"; 24 next-level-cache = <&L2_0>; [all …]
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| H A D | bcm6878.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/interrupt-controller/irq.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 14 interrupt-parent = <&gic>; 17 #address-cells = <1>; 18 #size-cells = <0>; 22 compatible = "arm,cortex-a7"; 24 next-level-cache = <&L2_0>; [all …]
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| H A D | bcm6846.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/interrupt-controller/irq.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 14 interrupt-parent = <&gic>; 17 #address-cells = <1>; 18 #size-cells = <0>; 22 compatible = "arm,cortex-a7"; 24 next-level-cache = <&L2_0>; [all …]
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| H A D | bcm6855.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/interrupt-controller/irq.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 14 interrupt-parent = <&gic>; 17 #address-cells = <1>; 18 #size-cells = <0>; 22 compatible = "arm,cortex-a7"; 24 next-level-cache = <&L2_0>; [all …]
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| H A D | bcm63138.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/interrupt-controller/irq.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 interrupt-parent = <&gic>; 22 #address-cells = <1>; 23 #size-cells = <0>; 27 compatible = "arm,cortex-a9"; 28 next-level-cache = <&L2>; [all …]
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| /linux/arch/arm64/boot/dts/broadcom/northstar2/ |
| H A D | ns2.dtsi | 35 #include <dt-bindings/interrupt-controller/arm-gic.h> 36 #include <dt-bindings/clock/bcm-ns2.h> 40 interrupt-parent = <&gic>; 41 #address-cells = <2>; 42 #size-cells = <2>; 45 #address-cells = <2>; 46 #size-cells = <0>; 50 compatible = "arm,cortex-a57"; 52 enable-method = "psci"; 53 next-level-cache = <&CLUSTER0_L2>; [all …]
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| /linux/arch/arm64/boot/dts/broadcom/stingray/ |
| H A D | stingray.dtsi | 4 * Copyright(c) 2015-2017 Broadcom. All rights reserved. 33 #include <dt-bindings/interrupt-controller/arm-gic.h> 37 interrupt-parent = <&gic>; 38 #address-cells = <2>; 39 #size-cells = <2>; 42 #address-cells = <2>; 43 #size-cells = <0>; 47 compatible = "arm,cortex-a72"; 49 enable-method = "psci"; 50 next-level-cache = <&CLUSTER0_L2>; [all …]
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| /linux/arch/arm64/boot/dts/broadcom/bcmbca/ |
| H A D | bcm6856.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #address-cells = <2>; 12 #size-cells = <2>; 14 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <0>; 21 compatible = "brcm,brahma-b53"; 24 next-level-cache = <&L2_0>; [all …]
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| H A D | bcm6858.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #address-cells = <2>; 12 #size-cells = <2>; 14 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <0>; 21 compatible = "brcm,brahma-b53"; 24 next-level-cache = <&L2_0>; [all …]
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| H A D | bcm63158.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #address-cells = <2>; 13 #size-cells = <2>; 15 interrupt-parent = <&gic>; 18 #address-cells = <2>; 19 #size-cells = <0>; 22 compatible = "brcm,brahma-b53"; 25 next-level-cache = <&L2_0>; [all …]
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| H A D | bcm4908.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 #include <dt-bindings/interrupt-controller/irq.h> 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/phy/phy.h> 6 #include <dt-bindings/soc/bcm-pmb.h> 8 /dts-v1/; 11 interrupt-parent = <&gic>; 13 #address-cells = <2>; 14 #size-cells = <2>; 21 stdout-path = "serial0:115200n8"; [all …]
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