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Searched +full:iproc +full:- +full:pcie (Results 1 – 16 of 16) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dbrcm,iproc-pcie.txt1 * Broadcom iProc PCIe controller with the platform bus interface
4 - compatible:
5 "brcm,iproc-pcie" for the first generation of PAXB based controller,
7 "brcm,iproc-pcie-paxb-v2" for the second generation of PAXB-based
9 "brcm,iproc-pcie-paxc" for the first generation of PAXC based
11 "brcm,iproc-pcie-paxc-v2" for the second generation of PAXC based
13 PAXB-based root complex is used for external endpoint devices. PAXC-based
15 - reg: base address and length of the PCIe controller I/O register space
16 - #interrupt-cells: set to <1>
17 - interrupt-map-mask and interrupt-map, standard PCI properties to define the
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H A Dbrcm,iproc-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/brcm,iproc-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom iProc PCIe controller with the platform bus interface
10 - Ray Jui <ray.jui@broadcom.com>
11 - Scott Branden <scott.branden@broadcom.com>
14 - $ref: /schemas/pci/pci-host-bridge.yaml#
19 - enum:
22 - brcm,iproc-pcie
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/freebsd/sys/contrib/device-tree/src/arm64/broadcom/northstar2/
H A Dns2.dtsi35 #include <dt-bindings/interrupt-controller/arm-gic.h>
36 #include <dt-bindings/clock/bcm-ns2.h>
40 interrupt-parent = <&gic>;
41 #address-cells = <2>;
42 #size-cells = <2>;
45 #address-cells = <2>;
46 #size-cells = <0>;
50 compatible = "arm,cortex-a57";
52 enable-method = "psci";
53 next-level-cache = <&CLUSTER0_L2>;
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/freebsd/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm-hr2.dtsi33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
39 interrupt-parent = <&gic>;
40 #address-cells = <1>;
41 #size-cells = <1>;
44 #address-cells = <1>;
45 #size-cell
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H A Dbcm-cygnus.dtsi33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
35 #include <dt-bindings/clock/bcm-cygnus.h>
38 #address-cells = <1>;
39 #size-cells = <1>;
42 interrupt-paren
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H A Dbcm-nsp.dtsi33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
35 #include <dt-bindings/clock/bcm-nsp.h>
38 #address-cells = <1>;
39 #size-cells = <1>;
42 interrupt-paren
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H A Dbcm-ns.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
6 #include <dt-bindings/clock/bcm-nsp.h>
7 #include <dt-binding
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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dbrcm,mdio-mux-iproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/brcm,mdio-mux-iproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MDIO bus multiplexer found in Broadcom iProc based SoCs.
10 - Florian Fainelli <f.fainelli@gmail.com>
14 external to SoCs and could accept MDIO transaction compatible to C-22 or
15 C-45 Clause. When child bus is selected, one needs to select these two
19 - $ref: /schemas/net/mdio-mux.yaml#
23 const: brcm,mdio-mux-iproc
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H A Dbrcm,mdio-mux-iproc.txt1 Properties for an MDIO bus multiplexer found in Broadcom iProc based SoCs.
4 external to SoCs and could accept MDIO transaction compatible to C-22 or
5 C-45 Clause. When child bus is selected, one needs to select these two
11 - compatible: brcm,mdio-mux-iproc.
13 Every non-ethernet PHY requires a compatible so that it could be probed based
17 - clocks: phandle of the core clock which drives the mdio block.
20 at- Documentation/devicetree/bindings/net/mdio-mux.yaml
24 mdio_mux_iproc: mdio-mux@66020000 {
25 compatible = "brcm,mdio-mux-iproc";
27 #address-cells = <1>;
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/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dbrcm,iproc-mhb.txt1 Broadcom iProc Multi Host Bridge (MHB)
3 Certain Broadcom iProc SoCs have a multi host bridge (MHB) block that controls
4 the connection and configuration of 1) internal PCIe serdes; 2) PCIe endpoint
10 - compatible: should contain:
11 "brcm,sr-mhb", "syscon" for Stingray
12 - reg: base address and range of the MHB registers
16 compatible = "brcm,sr-mhb", "syscon";
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dbrcm,iproc-clocks.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/brcm,iproc-clocks.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom iProc Family Clocks
10 - Ray Jui <rjui@broadcom.com>
11 - Scott Branden <sbranden@broadcom.com>
14 The iProc clock controller manages clocks that are common to the iProc family.
15 An SoC from the iProc family may have several PLLs, e.g., ARMPLL, GENPLL,
25 - brcm,bcm63138-armpll
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H A Dbrcm,iproc-clocks.txt1 Broadcom iProc Family Clocks
4 Documentation/devicetree/bindings/clock/clock-bindings.txt
6 The iProc clock controller manages clocks that are common to the iProc family.
7 An SoC from the iProc family may have several PPLs, e.g., ARMPLL, GENPLL,
13 - compatible:
14 Should have a value of the form "brcm,<soc>-<pll>". For example, GENPLL on
15 Cygnus has a compatible string of "brcm,cygnus-genpll"
17 - #clock-cells:
20 - reg:
21 Define the base and range of the I/O address space that contain the iProc
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/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dbrcm,mdio-mux-bus-pci.txt1 * Broadcom NS2 PCIe PHY binding document
4 - reg: MDIO Bus number for the MDIO interface
5 - #address-cells: must be 1
6 - #size-cells: must be 0
9 - compatible: should be "brcm,ns2-pcie-phy"
10 - reg: MDIO Phy ID for the MDIO interface
11 - #phy-cells: must be 0
13 This is a child bus node of "brcm,mdio-mux-iproc" node.
19 #address-cells = <1>;
20 #size-cells = <0>;
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/freebsd/sys/contrib/device-tree/src/arm64/broadcom/stingray/
H A Dstingray.dtsi4 * Copyright(c) 2015-2017 Broadcom. All rights reserved.
33 #include <dt-bindings/interrupt-controller/arm-gic.h>
37 interrupt-parent = <&gic>;
38 #address-cells = <2>;
39 #size-cells = <2>;
42 #address-cells = <2>;
43 #size-cells = <0>;
47 compatible = "arm,cortex-a72";
49 enable-method = "psci";
50 next-level-cache = <&CLUSTER0_L2>;
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H A Dstingray-pcie.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
6 pcie8: pcie@60400000 {
7 compatible = "brcm,iproc-pcie-pax
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/freebsd/sys/contrib/device-tree/Bindings/arm/bcm/
H A Dbrcm,hr2.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 are based on Broadcom's iProc SoC architecture and feature a single core Cortex
12 A9 ARM CPUs, DDR2/DDR3 memory, PCIe GEN-2, USB 2.0 and USB 3.0, serial and NAND
13 flash and a PCIe attached integrated switching engine.
16 - Florian Fainelli <f.fainelli@gmail.com>
23 - enum:
24 - ubnt,unifi-switch8
25 - const: brcm,bcm53342
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