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Searched +full:ipq806x +full:- +full:nand (Results 1 – 2 of 2) sorted by relevance

/linux/Documentation/devicetree/bindings/dma/
H A Dqcom,adm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christian Marangi <ansuelsmth@gmail.com>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
15 peripheral buses such as NAND and SPI.
27 "#dma-cells":
32 - description: phandle to the core clock
33 - description: phandle to the iface clock
35 clock-names:
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/linux/drivers/mtd/nand/raw/
H A Dqcom_nandc.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
18 #include <linux/mtd/nand-qpic-common.h>
21 * NAND special boot partitions
57 * NAND chip structure
62 * @chip: base NAND chip structure
82 * ecc/non-ecc mode for the current nand flash
132 ((u8 *)chip->controller - sizeof(struct qcom_nand_controller)); in get_qcom_nand_controller()
137 return ioread32(nandc->base + offset); in nandc_read()
143 iowrite32(val, nandc->base + offset); in nandc_write()
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