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/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,gcc-ipq8064.yaml4 $id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8064.yaml#
7 title: Qualcomm Global Clock & Reset Controller on IPQ8064
14 domains on IPQ8064.
17 include/dt-bindings/clock/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)
18 include/dt-bindings/reset/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)
26 - const: qcom,gcc-ipq8064
64 compatible = "qcom,gcc-ipq8064", "syscon";
72 compatible = "qcom,ipq8064-tsens";
H A Dqcom,kpss-gcc.yaml21 - qcom,kpss-gcc-ipq8064
54 - qcom,kpss-gcc-ipq8064
76 compatible = "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc", "syscon";
H A Dqcom,lcc.yaml16 - qcom,lcc-ipq8064
116 compatible = "qcom,lcc-ipq8064";
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,ipq8064-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,ipq8064-pinctrl.yaml#
7 title: Qualcomm Technologies, Inc. IPQ8064 TLMM block
13 Top Level Mode Multiplexer pin controller in Qualcomm IPQ8064 SoC.
20 const: qcom,ipq8064-pinctrl
33 - $ref: "#/$defs/qcom-ipq8064-tlmm-state"
36 $ref: "#/$defs/qcom-ipq8064-tlmm-state"
40 qcom-ipq8064-tlmm-state:
85 compatible = "qcom,ipq8064-pinctrl";
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-ipq8064-v2.0.dtsi3 #include "qcom-ipq8064.dtsi"
6 model = "Qualcomm Technologies, Inc. IPQ8064-v2.0";
44 compatible = "qcom,pcie-ipq8064-v2";
48 compatible = "qcom,pcie-ipq8064-v2";
52 compatible = "qcom,pcie-ipq8064-v2";
H A Dqcom-ipq8064-ap148.dts2 #include "qcom-ipq8064-v1.0.dtsi"
5 model = "Qualcomm Technologies, Inc. IPQ8064/AP-148";
6 compatible = "qcom,ipq8064-ap148", "qcom,ipq8064";
H A Dqcom-ipq8065.dtsi3 #include "qcom-ipq8064-v2.0.dtsi"
7 compatible = "qcom,ipq8065", "qcom,ipq8064";
H A Dqcom-ipq8062.dtsi3 #include "qcom-ipq8064-v2.0.dtsi"
7 compatible = "qcom,ipq8062", "qcom,ipq8064";
H A Dqcom-ipq8064-v1.0.dtsi2 #include "qcom-ipq8064.dtsi"
7 model = "Qualcomm Technologies, Inc. IPQ8064-v1.0";
H A Dqcom-ipq8064-v2.0-smb208.dtsi3 #include "qcom-ipq8064-v2.0.dtsi"
H A Dqcom-ipq8064-smb208.dtsi3 #include "qcom-ipq8064.dtsi"
H A Dqcom-ipq8064-rb3011.dts2 #include "qcom-ipq8064.dtsi"
8 compatible = "mikrotik,rb3011", "qcom,ipq8064";
/linux/Documentation/devicetree/bindings/net/
H A Dqcom,ipq8064-mdio.yaml4 $id: http://devicetree.org/schemas/net/qcom,ipq8064-mdio.yaml#
21 const: qcom,ipq8064-mdio
46 compatible = "qcom,ipq8064-mdio";
/linux/Documentation/devicetree/bindings/pci/
H A Dqcom,pcie.yaml26 - qcom,pcie-ipq8064
27 - qcom,pcie-ipq8064-v2
151 - qcom,pcie-ipq8064
240 - qcom,pcie-ipq8064
617 - qcom,pcie-ipq8064
683 - qcom,pcie-ipq8064
684 - qcom,pcie-ipq8064-v2
700 compatible = "qcom,pcie-ipq8064";
/linux/Documentation/devicetree/bindings/watchdog/
H A Dqcom-wdt.yaml54 - qcom,kpss-wdt-ipq8064
138 compatible = "qcom,kpss-wdt-ipq8064", "qcom,kpss-timer", "qcom,msm-timer";
/linux/drivers/clk/qcom/
H A Dclk-krait.c32 /* apq/ipq8064 Errata: disable sec_src clock gating during switch. */ in __krait_mux_set_sel()
46 /* apq/ipq8064 Errata: re-enabled sec_src clock gating. */ in __krait_mux_set_sel()
/linux/Documentation/devicetree/bindings/usb/
H A Dqcom,dwc3.yaml32 - qcom,ipq8064-dwc3
200 - qcom,ipq8064-dwc3
490 - qcom,ipq8064-dwc3
H A Dqcom,snps-dwc3.yaml32 - qcom,ipq8064-dwc3
185 - qcom,ipq8064-dwc3
478 - qcom,ipq8064-dwc3
/linux/drivers/dma/qcom/
H A DKconfig9 controller, as present on MSM8x60, APQ8064, and IPQ8064 devices.
/linux/Documentation/devicetree/bindings/mfd/
H A Dqcom,tcsr.yaml48 - qcom,tcsr-ipq8064
/linux/drivers/net/mdio/
H A DMakefile18 obj-$(CONFIG_MDIO_IPQ8064) += mdio-ipq8064.o
/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,rpm.yaml24 - qcom,rpm-ipq8064
H A Dqcom,saw2.yaml30 - qcom,ipq8064-saw2-cpu
/linux/Documentation/devicetree/bindings/dma/
H A Dqcom,bam-dma.yaml20 # APQ8064, IPQ8064 and MSM8960
/linux/Documentation/devicetree/bindings/nvmem/
H A Dqcom,qfprom.yaml26 - qcom,ipq8064-qfprom

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