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Searched +full:ipq4019 +full:- +full:nand (Results 1 – 9 of 9) sorted by relevance

/linux/Documentation/devicetree/bindings/mtd/
H A Dqcom,nandc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm NAND controller
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
15 - qcom,ipq806x-nand
16 - qcom,ipq4019-nand
17 - qcom,ipq6018-nand
18 - qcom,ipq8074-nand
19 - qcom,sdx55-nand
[all …]
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-ipq4019-ap.dk04.1-c1.dts1 // SPDX-License-Identifier: GPL-2.0
4 #include "qcom-ipq4019-ap.dk04.1.dtsi"
7 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1-C1";
8 compatible = "qcom,ipq4019-dk04.1-c1", "qcom,ipq4019";
11 dma-controller@7984000 {
17 &nand {
H A Dqcom-ipq4019-ap.dk07.1.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include "qcom-ipq4019.dtsi"
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/gpio/gpio.h>
9 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1";
22 stdout-path = "serial0:115200n8";
27 serial_0_pins: serial0-state {
30 bias-disable;
33 i2c_0_pins: i2c-0-state {
36 bias-disable;
[all …]
H A Dqcom-ipq4019-ap.dk04.1.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include "qcom-ipq4019.dtsi"
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/gpio/gpio.h>
9 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1";
17 stdout-path = "serial0:115200n8";
27 serial_0_pins: serial0-state {
30 bias-disable;
33 serial_1_pins: serial1-state {
37 bias-disable;
[all …]
H A Dqcom-ipq4018-jalapeno.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 #include "qcom-ipq4019.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
14 mdio_pins: mdio-state {
15 mdio-pins {
18 bias-pull-up;
21 mdc-pins {
24 bias-pull-up;
28 serial_pins: serial-state {
[all …]
H A Dqcom-ipq4018-ap120c-ac.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include "qcom-ipq4019.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
8 model = "ALFA Network AP120C-AC";
9 compatible = "alfa-network,ap120c-ac", "qcom,ipq4018";
16 stdout-path = "serial0:115200n8";
20 compatible = "gpio-keys";
22 key-reset {
31 i2c0_pins: i2c0-state {
[all …]
/linux/drivers/mtd/nand/raw/
H A Dqcom_nandc.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
18 #include <linux/mtd/nand-qpic-common.h>
21 * NAND special boot partitions
57 * NAND chip structure
62 * @chip: base NAND chip structure
82 * ecc/non-ecc mode for the current nand flash
132 ((u8 *)chip->controller - sizeof(struct qcom_nand_controller)); in get_qcom_nand_controller()
137 return ioread32(nandc->base + offset); in nandc_read()
143 iowrite32(val, nandc->base + offset); in nandc_write()
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dipq6018.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,gcc-ipq6018.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq6018.h>
11 #include <dt-bindings/clock/qcom,apss-ipq.h>
12 #include <dt-bindings/thermal/thermal.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&intc>;
20 sleep_clk: sleep-clk {
[all …]
/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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