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/linux/drivers/clk/imx/
H A Dclk-imx25.c49 "ipg", "dummy", "dummy", "dummy",
54 dummy, osc, mpll, upll, mpll_cpu_3_4, cpu_sel, cpu, ahb, usb_div, ipg, enumerator
89 clk[ipg] = imx_clk_fixed_factor("ipg", "ahb", 1, 2); in __mx25_clocks_init()
156 clk[can1_ipg] = imx_clk_gate("can1_ipg", "ipg", ccm(CCM_CGCR1), 2); in __mx25_clocks_init()
157 clk[can2_ipg] = imx_clk_gate("can2_ipg", "ipg", ccm(CCM_CGCR1), 3); in __mx25_clocks_init()
158 clk[csi_ipg] = imx_clk_gate("csi_ipg", "ipg", ccm(CCM_CGCR1), 4); in __mx25_clocks_init()
159 clk[cspi1_ipg] = imx_clk_gate("cspi1_ipg", "ipg", ccm(CCM_CGCR1), 5); in __mx25_clocks_init()
160 clk[cspi2_ipg] = imx_clk_gate("cspi2_ipg", "ipg", ccm(CCM_CGCR1), 6); in __mx25_clocks_init()
161 clk[cspi3_ipg] = imx_clk_gate("cspi3_ipg", "ipg", ccm(CCM_CGCR1), 7); in __mx25_clocks_init()
162 clk[dryice_ipg] = imx_clk_gate("dryice_ipg", "ipg", ccm(CCM_CGCR1), 8); in __mx25_clocks_init()
[all …]
H A Dclk-imx35.c65 /* 9 */ ipg, arm_per_div, ahb_per_div, ipg_per, uart_sel, uart_div, enumerator
132 clk[ipg] = imx_clk_fixed_factor("ipg", "ahb", 1, 2); in _mx35_clocks_init()
164 clk[asrc_gate] = imx_clk_gate2("asrc_gate", "ipg", base + MX35_CCM_CGR0, 0); in _mx35_clocks_init()
165 clk[pata_gate] = imx_clk_gate2("pata_gate", "ipg", base + MX35_CCM_CGR0, 2); in _mx35_clocks_init()
166 clk[audmux_gate] = imx_clk_gate2("audmux_gate", "ipg", base + MX35_CCM_CGR0, 4); in _mx35_clocks_init()
167 clk[can1_gate] = imx_clk_gate2("can1_gate", "ipg", base + MX35_CCM_CGR0, 6); in _mx35_clocks_init()
168 clk[can2_gate] = imx_clk_gate2("can2_gate", "ipg", base + MX35_CCM_CGR0, 8); in _mx35_clocks_init()
169 clk[cspi1_gate] = imx_clk_gate2("cspi1_gate", "ipg", base + MX35_CCM_CGR0, 10); in _mx35_clocks_init()
170 clk[cspi2_gate] = imx_clk_gate2("cspi2_gate", "ipg", base + MX35_CCM_CGR0, 12); in _mx35_clocks_init()
171 clk[ect_gate] = imx_clk_gate2("ect_gate", "ipg", base + MX35_CCM_CGR0, 14); in _mx35_clocks_init()
[all …]
H A Dclk-imx6ul.c56 static const char *perclk_sels[] = { "ipg", "osc", };
65 "dummy", "lcdif_pix", "ahb", "ipg", "ipg_per", "ckil", "pll4_audio_div", };
305 hws[IMX6UL_CLK_IPG] = imx_clk_hw_divider("ipg", "ahb", base + 0x14, 8, 2); in imx6ul_clocks_init()
355 hws[IMX6UL_CLK_CAAM_IPG] = imx_clk_hw_gate2("caam_ipg", "ipg", base + 0x68, 12); in imx6ul_clocks_init()
358 hws[IMX6UL_CLK_ENET] = imx_clk_hw_gate2("enet", "ipg", base + 0x68, 12); in imx6ul_clocks_init()
361 hws[IMX6UL_CLK_CAN1_IPG] = imx_clk_hw_gate2("can1_ipg", "ipg", base + 0x68, 14); in imx6ul_clocks_init()
363 hws[IMX6UL_CLK_CAN2_IPG] = imx_clk_hw_gate2("can2_ipg", "ipg", base + 0x68, 18); in imx6ul_clocks_init()
367 hws[IMX6UL_CLK_UART2_IPG] = imx_clk_hw_gate2("uart2_ipg", "ipg", base + 0x68, 28); in imx6ul_clocks_init()
371 hws[IMX6UL_CLK_GPIO2] = imx_clk_hw_gate2("gpio2", "ipg", base + 0x68, 30); in imx6ul_clocks_init()
378 hws[IMX6UL_CLK_ADC2] = imx_clk_hw_gate2("adc2", "ipg", base + 0x6c, 8); in imx6ul_clocks_init()
[all …]
H A Dclk-imx6sll.c50 static const char *perclk_sels[] = { "ipg", "osc", };
222 hws[IMX6SLL_CLK_IPG] = imx_clk_hw_divider("ipg", "ahb", base + 0x14, 8, 2); in imx6sll_clocks_init()
262 hws[IMX6SLL_CLK_UART2_IPG] = imx_clk_hw_gate2("uart2_ipg", "ipg", base + 0x68, 28); in imx6sll_clocks_init()
264 hws[IMX6SLL_CLK_GPIO2] = imx_clk_hw_gate2("gpio2", "ipg", base + 0x68, 30); in imx6sll_clocks_init()
271 hws[IMX6SLL_CLK_UART3_IPG] = imx_clk_hw_gate2("uart3_ipg", "ipg", base + 0x6c, 10); in imx6sll_clocks_init()
277 hws[IMX6SLL_CLK_UART4_IPG] = imx_clk_hw_gate2("uart4_ipg", "ipg", base + 0x6c, 24); in imx6sll_clocks_init()
279 hws[IMX6SLL_CLK_GPIO1] = imx_clk_hw_gate2("gpio1", "ipg", base + 0x6c, 26); in imx6sll_clocks_init()
280 hws[IMX6SLL_CLK_GPIO5] = imx_clk_hw_gate2("gpio5", "ipg", base + 0x6c, 30); in imx6sll_clocks_init()
283 hws[IMX6SLL_CLK_GPIO6] = imx_clk_hw_gate2("gpio6", "ipg", base + 0x70, 0); in imx6sll_clocks_init()
288 hws[IMX6SLL_CLK_OCOTP] = imx_clk_hw_gate2("ocotp", "ipg", base + 0x70, 12); in imx6sll_clocks_init()
[all …]
H A Dclk-imx6sl.c47 static const char *perclk_sels[] = { "ipg", "osc", };
112 * ARM to IPG clock ratio is less than 12:5 (that is < 2.4x), before
116 * As IPG clock is fixed at 66MHz(so ARM freq must not exceed 158.4MHz),
331 …hws[IMX6SL_CLK_IPG] = imx_clk_hw_divider("ipg", "ahb", b… in imx6sl_clocks_init()
372 …hws[IMX6SL_CLK_ENET] = imx_clk_hw_gate2("enet", "ipg", base + 0x6c, … in imx6sl_clocks_init()
382 …hws[IMX6SL_CLK_OCOTP] = imx_clk_hw_gate2("ocotp", "ipg", base + 0x70, … in imx6sl_clocks_init()
389 …hws[IMX6SL_CLK_MMDC_P0_IPG] = imx_clk_hw_gate2_flags("mmdc_p0_ipg", "ipg", base + 0x74, … in imx6sl_clocks_init()
390 …hws[IMX6SL_CLK_MMDC_P1_IPG] = imx_clk_hw_gate2("mmdc_p1_ipg", "ipg", base + 0x74, … in imx6sl_clocks_init()
396 …hws[IMX6SL_CLK_SDMA] = imx_clk_hw_gate2("sdma", "ipg", base + 0x7c, … in imx6sl_clocks_init()
397 …hws[IMX6SL_CLK_SPBA] = imx_clk_hw_gate2("spba", "ipg", base + 0x7c, … in imx6sl_clocks_init()
[all …]
H A Dclk-imx6sx.c40 static const char *perclk_sels[] = { "ipg", "osc", };
61 "lcdif1_pix", "ahb", "ipg", "perclk", "ckil", "pll4_audio_div",
315 …hws[IMX6SX_CLK_IPG] = imx_clk_hw_divider("ipg", "ahb", bas… in imx6sx_clocks_init()
377 …hws[IMX6SX_CLK_CAAM_IPG] = imx_clk_hw_gate2("caam_ipg", "ipg", base + 0x68,… in imx6sx_clocks_init()
378 …hws[IMX6SX_CLK_CAN1_IPG] = imx_clk_hw_gate2("can1_ipg", "ipg", base + 0x68,… in imx6sx_clocks_init()
380 …hws[IMX6SX_CLK_CAN2_IPG] = imx_clk_hw_gate2("can2_ipg", "ipg", base + 0x68,… in imx6sx_clocks_init()
397 …hws[IMX6SX_CLK_WAKEUP] = imx_clk_hw_gate2_flags("wakeup", "ipg", base + 0x6c, 18, CLK_IS_CRI… in imx6sx_clocks_init()
409 …hws[IMX6SX_CLK_OCOTP] = imx_clk_hw_gate2("ocotp", "ipg", base + 0x70,… in imx6sx_clocks_init()
420 …hws[IMX6SX_CLK_ENET] = imx_clk_hw_gate2("enet", "ipg", base + 0x74,… in imx6sx_clocks_init()
429 …hws[IMX6SX_CLK_MMDC_P0_IPG] = imx_clk_hw_gate2_flags("mmdc_p0_ipg", "ipg", base + 0x74, 24, CLK_I… in imx6sx_clocks_init()
[all …]
/linux/arch/powerpc/boot/dts/
H A Dmpc5121.dtsi68 clock-names = "ipg";
164 clock-names = "ipg", "ips", "sys", "ref", "mclk";
176 clock-names = "ipg", "ips", "sys", "ref", "mclk";
187 clock-names = "ipg", "per";
197 clock-names = "ipg";
207 clock-names = "ipg";
217 clock-names = "ipg";
230 clock-names = "ipg";
238 clock-names = "ipg";
250 clock-names = "ipg", "ips", "sys", "ref", "mclk";
[all …]
H A Dmpc5125twr.dts134 clock-names = "ipg", "ips", "sys", "ref", "mclk";
146 clock-names = "ipg", "ips", "sys", "ref", "mclk";
155 clock-names = "ipg", "per";
165 clock-names = "ipg";
175 clock-names = "ipg";
185 clock-names = "ipg";
198 clock-names = "ipg";
241 clock-names = "ipg";
263 clock-names = "ipg", "mclk";
275 clock-names = "ipg", "mclk";
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx50.dtsi125 clock-names = "ipg", "ahb", "per";
137 clock-names = "ipg", "ahb", "per";
148 clock-names = "ipg", "per";
160 clock-names = "ipg", "per";
186 clock-names = "ipg", "ahb", "per";
198 clock-names = "ipg", "ahb", "per";
283 clock-names = "ipg", "per";
297 clock-names = "ipg", "per";
307 clock-names = "ipg", "per";
317 clock-names = "ipg", "per";
[all …]
H A Dimx53.dtsi246 clock-names = "ipg", "ahb", "per";
258 clock-names = "ipg", "ahb", "per";
269 clock-names = "ipg", "per";
283 clock-names = "ipg", "per";
296 clock-names = "ipg", "baud";
311 clock-names = "ipg", "ahb", "per";
323 clock-names = "ipg", "ahb", "per";
451 clock-names = "ipg", "per";
533 clock-names = "ipg", "per";
543 clock-names = "ipg", "per";
[all …]
H A Dimx51.dtsi198 clock-names = "ipg", "ahb", "per";
209 clock-names = "ipg", "ahb", "per";
220 clock-names = "ipg", "per";
234 clock-names = "ipg", "per";
245 clock-names = "ipg", "baud";
260 clock-names = "ipg", "ahb", "per";
272 clock-names = "ipg", "ahb", "per";
399 clock-names = "ipg", "per";
413 clock-names = "ipg", "per";
423 clock-names = "ipg", "per";
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8-ss-dma.dtsi11 dma_ipg_clk: clock-dma-ipg {
33 clock-names = "per", "ipg";
51 clock-names = "per", "ipg";
69 clock-names = "per", "ipg";
87 clock-names = "per", "ipg";
101 clock-names = "ipg", "baud";
115 clock-names = "ipg", "baud";
129 clock-names = "ipg", "baud";
143 clock-names = "ipg", "baud";
158 clock-names = "ipg", "per";
[all …]
H A Dimx8-ss-cm40.dtsi9 cm40_ipg_clk: clock-cm40-ipg {
28 clock-names = "ipg", "baud";
41 clock-names = "per", "ipg";
63 clock-names = "ipg";
H A Dimx8-ss-lvds1.dtsi22 clock-names = "ipg";
79 clock-names = "ipg", "per";
95 clock-names = "per", "ipg";
108 clock-names = "per", "ipg";
H A Dimx8-ss-cm41.dtsi10 cm41_ipg_clk: clock-cm41-ipg {
30 clock-names = "per", "ipg";
52 clock-names = "ipg";
/linux/drivers/clocksource/
H A Dtimer-imx-tpm.c185 struct clk *ipg; in tpm_timer_init() local
188 ipg = of_clk_get_by_name(np, "ipg"); in tpm_timer_init()
189 if (IS_ERR(ipg)) { in tpm_timer_init()
190 pr_err("tpm: failed to get ipg clk\n"); in tpm_timer_init()
194 ret = clk_prepare_enable(ipg); in tpm_timer_init()
196 pr_err("tpm: ipg clock enable failed (%d)\n", ret); in tpm_timer_init()
197 clk_put(ipg); in tpm_timer_init()
/linux/drivers/net/ethernet/mscc/
H A Docelot_police.h15 MSCC_QOS_RATE_MODE_LINE, /* Measure line rate in kbps incl. IPG */
16 MSCC_QOS_RATE_MODE_DATA, /* Measures data rate in kbps excl. IPG */
31 u8 ipg; /* Size of IPG when MSCC_QOS_RATE_MODE_LINE is chosen */ member
H A Docelot_police.c11 #define POL_MODE_LINERATE 0 /* Incl IPG. Unit: 33 1/3 kbps, 4096 bytes */
12 #define POL_MODE_DATARATE 1 /* Excl IPG. Unit: 33 1/3 kbps, 4096 bytes */
30 u8 ipg = 20; in qos_policer_conf_set() local
41 ipg = min_t(u8, GENMASK(4, 0), conf->ipg); in qos_policer_conf_set()
132 value = (ANA_POL_MODE_CFG_IPG_SIZE(ipg) | in qos_policer_conf_set()
/linux/sound/soc/fsl/
H A Dfsl_rpmsg.c254 rpmsg->ipg = devm_clk_get_optional(&pdev->dev, "ipg"); in fsl_rpmsg_probe()
255 if (IS_ERR(rpmsg->ipg)) in fsl_rpmsg_probe()
256 return PTR_ERR(rpmsg->ipg); in fsl_rpmsg_probe()
304 ret = clk_prepare_enable(rpmsg->ipg); in fsl_rpmsg_runtime_resume()
306 dev_err(dev, "failed to enable ipg clock: %d\n", ret); in fsl_rpmsg_runtime_resume()
319 clk_disable_unprepare(rpmsg->ipg); in fsl_rpmsg_runtime_resume()
329 clk_disable_unprepare(rpmsg->ipg); in fsl_rpmsg_runtime_suspend()
H A Dfsl_mqs.c71 struct clk *ipg; member
280 mqs_priv->ipg = devm_clk_get(&pdev->dev, "core"); in fsl_mqs_probe()
281 if (IS_ERR(mqs_priv->ipg)) { in fsl_mqs_probe()
283 PTR_ERR(mqs_priv->ipg)); in fsl_mqs_probe()
284 return PTR_ERR(mqs_priv->ipg); in fsl_mqs_probe()
316 ret = clk_prepare_enable(mqs_priv->ipg); in fsl_mqs_runtime_resume()
318 dev_err(dev, "failed to enable ipg clock\n"); in fsl_mqs_runtime_resume()
325 clk_disable_unprepare(mqs_priv->ipg); in fsl_mqs_runtime_resume()
340 clk_disable_unprepare(mqs_priv->ipg); in fsl_mqs_runtime_suspend()
H A Dfsl_rpmsg.h22 * @ipg: ipg clock for cpu dai (SAI)
35 struct clk *ipg; member
/linux/Documentation/devicetree/bindings/crypto/
H A Dfsl-imx-sahara.yaml29 - description: Sahara IPG clock
34 - const: ipg
73 clock-names = "ipg", "ahb";
/linux/Documentation/devicetree/bindings/timer/
H A Dnxp,tpm-timer.yaml36 - description: SoC TPM ipg clock
41 - const: ipg
64 clock-names = "ipg", "per";
/linux/Documentation/devicetree/bindings/pwm/
H A Dimx-pwm.yaml52 - description: SoC PWM ipg clock
57 - const: ipg
84 clock-names = "ipg", "per";
/linux/Documentation/devicetree/bindings/rtc/
H A Dnxp,s32g-rtc.yaml37 - description: ipg clock drives the access to the RTC iomapped registers
48 - const: ipg
71 clock-names = "ipg", "source0";

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