/freebsd/sys/contrib/device-tree/Bindings/iommu/ |
H A D | qcom,iommu.txt | 1 * QCOM IOMMU v1 Implementation 3 Qualcomm "B" family devices which are not compatible with arm-smmu have 4 a similar looking IOMMU but without access to the global register space, 6 to non-secure vs secure interrupt line. 10 - compatible : Should be one of: 12 "qcom,msm8916-iommu" 13 "qcom,msm8953-iommu" 15 Followed by "qcom,msm-iommu-v1". 17 - clock-names : Should be a pair of "iface" (required for IOMMUs 21 - clocks : Phandles for respective clocks described by [all …]
|
H A D | qcom,iommu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id [all...] |
H A D | msm,iommu-v0.txt | 1 * QCOM IOMMU 3 The MSM IOMMU is an implementation compatible with the ARM VMSA short 5 of the CPU, each connected to the IOMMU through a port called micro-TLB. 9 - compatible: Must contain "qcom,apq8064-iommu". 10 - reg: Base address and size of the IOMMU registers. 11 - interrupts: Specifiers for the MMU fault interrupts. For instances that 12 support secure mode two interrupts must be specified, for non-secure and 13 secure mode, in that order. For instances that don't support secure mode a 15 - #iommu-cells: The number of cells needed to specify the stream id. This 17 - qcom,ncb: The total number of context banks in the IOMMU. [all …]
|
H A D | arm,smmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/iommu/arm,smmu.yaml# 5 $schema: http://devicetree.org/meta-schema [all...] |
H A D | renesas,ipmmu-vmsa.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iommu/renesas,ipmmu-vmsa.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Renesas VMSA-Compatible IOMMU 10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> 13 The IPMMU is an IOMMU implementation compatible with the ARM VMSA page tables. 15 connected to the IPMMU through a port called micro-TLB. 20 - items: 21 - enum: [all …]
|
/freebsd/sys/x86/iommu/ |
H A D | amd_reg.h | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 133 * IOMMU Control Register AMDIOMMU_CTRL fields 135 #define AMDIOMMU_CTRL_EN 0x0000000000000001ull /* IOMMU En */ 170 #define AMDIOMMU_CTRL_DUALPPRLOG_SWAP 0x0000000080000000ull /* Auto-swap on full */ 175 #define AMDIOMMU_CTRL_DUALEVNTLOG_SWAP 0x0000000200000000ull /* Auto-swap on full */ 193 #define AMDIOMMU_CTRL_INTCAPXT_EN 0x0008000000000000ull /* x2APIC mode for IOMMU intrs */ 205 * IOMMU Extended Feature Register AMDIOMMU_EFR fields 217 /* IOMMU Command Pointers (Head/Tail) registers fields */ 220 /* IOMMU Command Buffer Base fields */ [all …]
|
/freebsd/sys/arm64/conf/ |
H A D | NOTES | 2 # NOTES -- Lines that can be cut/pasted into kernel and hints configs. 24 makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols 29 options VFP # Floating-point support 66 # Microsoft Hyper-V 77 device al_pci # Annapurna Alpine PCI-E 78 options PCI_HP # PCI-Express native HotPlug 79 options PCI_IOV # PCI SR-IOV support 109 device uart_ns8250 # ns8250-type UART driver 155 # Real-time clock support 156 device aw_rtc # Allwinner Real-time Clock [all …]
|
/freebsd/sys/contrib/device-tree/Bindings/display/msm/ |
H A D | gpu.txt | 4 - compatible: "qcom,adreno-XYZ.W", "qcom,adreno" or 5 "amd,imageon-XYZ.W", "amd,imageon" 6 for example: "qcom,adreno-306.0", "qcom,adreno" 9 with the chip-id. 11 - reg: Physical base address and length of the controller's registers. 12 - interrupts: The interrupt signal from the gpu. 13 - clocks: device clocks (if applicable) 14 See ../clocks/clock-bindings.txt for details. 15 - clock-names: the following clocks are required by a3xx, a4xx and a5xx 22 - qcom,adreno-630.2 [all …]
|
/freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
H A D | msm8916.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. 6 #include <dt-bindings/arm/coresight-cti-dt.h> 7 #include <dt-bindings/clock/qcom,gcc-msm891 [all...] |
H A D | msm8939.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2020-2023, Linaro Limited 7 #include <dt-bindings/clock/qcom,gcc-msm8939.h> 8 #include <dt-bindings/clock/qcom,rpmcc.h> 9 #include <dt-binding [all...] |
H A D | msm8953.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 4 #include <dt-bindings/clock/qcom,gcc-msm8953.h> 5 #include <dt-bindings/clock/qcom,rpmcc.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/interrupt-controlle [all...] |
H A D | sm6115.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 6 #include <dt-bindings/clock/qcom,gcc-sm6115.h> 7 #include <dt-bindings/clock/qcom,sm6115-dispcc.h> 8 #include <dt-binding [all...] |
H A D | sm8350.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/interconnect/qcom,sm8350.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/clock/qcom,dispcc-sm835 [all...] |
H A D | sm8150.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. 7 #include <dt-bindings/dma/qcom-gpi.h> 8 #include <dt-bindings/firmware/qcom,scm.h> 9 #include <dt-bindings/interrupt-controlle [all...] |
H A D | sm8250.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/qcom,dispcc-sm8250.h> 8 #include <dt-binding [all...] |
H A D | sdm845.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/qcom,camcc-sdm845.h> 9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h> 10 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 11 #include <dt-binding [all...] |
H A D | sm8550.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,rpmh.h> 7 #include <dt-bindings/clock/qcom,sm8450-videocc.h> 8 #include <dt-bindings/clock/qcom,sm8550-camcc.h> 9 #include <dt-binding [all...] |
H A D | sm8450.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/qcom,gcc-sm8450.h> 8 #include <dt-binding [all...] |
H A D | sm6350.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 7 #include <dt-bindings/clock/qcom,dispcc-sm6350.h> 8 #include <dt-bindings/clock/qcom,gcc-sm6350.h> 9 #include <dt-bindings/clock/qcom,gpucc-sm635 [all...] |
/freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
H A D | fsl-ls1028a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1028A family SoC. 5 * Copyright 2018-2020 NXP 11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 12 #include <dt-bindings/interrupt-controller/arm-gi [all...] |
/freebsd/sys/contrib/dev/acpica/include/ |
H A D | actbl2.h | 3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 11 * Some or all of this work - Copyright (c) 1999 - 2023, Intel Corp. 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 108 * any of its subsidiaries will export/re-export any technical data, process, 130 * 3. Neither the names of the above-listed copyright holders nor the names 195 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */ 198 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 204 * All tables must be byte-packed to match the ACPI specification, since [all …]
|
/freebsd/sys/contrib/device-tree/src/arm64/xilinx/ |
H A D | zynqmp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * (C) Copyright 2014 - 2021, Xilinx, Inc. 15 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h> 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/interrupt-controlle [all...] |
/freebsd/sys/contrib/device-tree/src/arm64/ti/ |
H A D | k3-j721e-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy.h> 8 #include <dt-bindings/phy/phy-ti.h> 9 #include <dt-bindings/mux/mux.h> 11 #include "k3-serde [all...] |
/freebsd/share/misc/ |
H A D | pci_vendors | 2 # List of PCI ID's 5 # Date: 2024-09-20 03:15:02 8 # the PCI ID Project at https://pci-ids.ucw.cz/. 14 # (version 2 or higher) or the 3-clause BSD License. 25 # device device_name <-- single tab 26 # subvendor subdevice subsystem_name <-- two tabs 28 0001 SafeNet (wrong ID) 29 0010 Allied Telesis, Inc (Wrong ID) 30 # This is a relabelled RTL-8139 31 8139 AT-2500TX V3 Ethernet [all …]
|
/freebsd/sys/contrib/dev/acpica/ |
H A D | changes.txt | 1 ---------------------------------------- 6 …AML Timer() operator. Discovered by UBSAN: ?array-index-out-of-bounds in acpica/dswexec.c:401:12 i… 12 1) ACPICA kernel-resident subsystem: 16 Fixed misspelled CDAT DSMAS define: ACPI_CEDT_DSMAS_NON_VOLATILE -> ACPI_CDAT_DSMAS_NON_VOLATILE. R… 18 1) ACPICA kernel-resident subsystem: 20 Fix GCC 12 dangling-pointer warning. We're storing a persistent pointer to an ephemeral local vari… 22 Also, some C run-times (like MUSL) aren't including <stdint.h> indirectly so we must include it exp… 31 ---------------------------------------- 41 Add OS-specific support for Zephyr RTOS. 46 Add first batch of RISC-V related definitions. [all …]
|