| /freebsd/sys/contrib/device-tree/Bindings/pci/ |
| H A D | pci-iommu.txt | 2 relationship between PCI(e) devices and IOMMU(s).
17 Requester ID. While a given PCI device can only master through one IOMMU, a
18 root complex may split masters across a set of IOMMUs (e.g. with one IOMMU per
22 and a mechanism is required to map from a PCI device to its IOMMU and sideband
25 For generic IOMMU bindings, see
26 Documentation/devicetree/bindings/iommu/iommu.txt.
33 -------------------
35 - iommu-map: Maps a Requester ID to an IOMMU and associated IOMMU specifier
39 (rid-base,iommu,iommu-base,length).
41 Any RID r in the interval [rid-base, rid-base + length) is associated with
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| H A D | apple,pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Kettenis <kettenis@openbsd.org>
22 the standard "reset-gpios" and "max-link-speed" properties appear on
34 - enum:
35 - apple,t8103-pcie
36 - apple,t8112-pcie
37 - apple,t6000-pcie
38 - const: apple,pcie
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| /freebsd/sys/contrib/device-tree/Bindings/misc/ |
| H A D | fsl,qoriq-mc.txt | 3 The Freescale Management Complex (fsl-mc) is a hardware resource
5 network-oriented packet processing applications. After the fsl-mc
12 For an overview of the DPAA2 architecture and fsl-mc bus see:
16 same hardware "isolation context" and a 10-bit value called an ICID
21 between ICIDs and IOMMUs, so an iommu-map property is used to define
22 the set of possible ICIDs under a root DPRC and how they map to
23 an IOMMU.
25 For generic IOMMU bindings, see
26 Documentation/devicetree/bindings/iommu/iommu.txt.
28 For arm-smmu binding, see:
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| H A D | fsl,qoriq-mc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/misc/fsl,qoriq-mc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
13 The Freescale Management Complex (fsl-mc) is a hardware resource
15 network-oriented packet processing applications. After the fsl-mc
22 For an overview of the DPAA2 architecture and fsl-mc bus see:
26 same hardware "isolation context" and a 10-bit value called an ICID
31 between ICIDs and IOMMUs, so an iommu-map property is used to define
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| /freebsd/sys/contrib/device-tree/Bindings/virtio/ |
| H A D | iommu.txt | 1 * virtio IOMMU PCI device
3 When virtio-iommu uses the PCI transport, its programming interface is
5 device tree statically describes the relation between IOMMU and DMA
6 masters. Therefore, the PCI root complex that hosts the virtio-iommu
7 contains a child node representing the IOMMU device explicitly.
11 - compatible: Should be "virtio,pci-iommu"
12 - reg: PCI address of the IOMMU. As defined in the PCI Bus
13 Binding reference [1], the reg property is a five-cell
18 - #iommu-cells: Each platform DMA master managed by the IOMMU is assigned
20 For virtio-iommu, #iommu-cells must be 1.
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| H A D | pci-iommu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/virtio/pci-iommu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: virtio-iommu device using the virtio-pci transport
10 - Jean-Philippe Brucker <jean-philippe@linaro.org>
13 When virtio-iommu uses the PCI transport, its programming interface is
15 device tree statically describes the relation between IOMMU and DMA
16 masters. Therefore, the PCI root complex that hosts the virtio-iommu
17 contains a child node representing the IOMMU device explicitly.
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| H A D | mmio.txt | 3 See https://ozlabs.org/~rusty/virtio-spec/ for more details.
7 - compatible: "virtio,mmio" compatibility string
8 - reg: control registers base address and size including configuration space
9 - interrupts: interrupt generated by the device
11 Required properties for virtio-iommu:
13 - #iommu-cells: When the node corresponds to a virtio-iommu device, it is
14 linked to DMA masters using the "iommus" or "iommu-map"
15 properties [1][2]. #iommu-cells specifies the size of the
16 "iommus" property. For virtio-iommu #iommu-cells must be
21 - iommus: If the device accesses memory through an IOMMU, it should
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| /freebsd/sys/dev/iommu/ |
| H A D | busdma_iommu.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
59 #include <dev/iommu/iommu.h>
63 #include <machine/iommu.h>
64 #include <dev/iommu/busdma_iommu.h>
68 * IOMMU units from Intel VT-d.
78 static const char iommu_str[] = "iommu"; in iommu_bus_dma_is_dev_disabled()
110 * the IOMMU unit and used for page table lookup. PCI bridges may take
114 * domain, and must collectively be assigned to use either IOMMU or
139 * host port to find the translating bridge nearest the IOMMU in iommu_get_requester()
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| H A D | busdma_iommu.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
34 #include <dev/iommu/iommu.h>
35 #include <dev/iommu/iommu_gas.h>
61 #define IOMMU_DMAMAP_INIT(map) mtx_init(&(map)->lock, \ argument
62 "iommu dmamap", NULL, MTX_DEF)
63 #define IOMMU_DMAMAP_DESTROY(map) mtx_destroy(&(map)->lock) argument
64 #define IOMMU_DMAMAP_LOCK(map) mtx_lock(&(map)->lock) argument
65 #define IOMMU_DMAMAP_UNLOCK(map) mtx_unlock(&(map)->lock) argument
|
| H A D | iommu.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
37 #include <dev/iommu/iommu_types.h>
62 TAILQ_ENTRY(iommu_map_entry) dmamap_link; /* DMA map entries */
79 /* Busdma delayed map load */
87 * entries. This is a client-controlled quirk to support some
94 int (*map)(struct iommu_domain *domain, struct iommu_map_entry *entry, member
102 * (u) - Protected by iommu unit lock
103 * (d) - Protected by domain lock
104 * (c) - Immutable after initialization
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| /freebsd/sys/contrib/device-tree/Bindings/bus/ |
| H A D | xlnx,versal-net-cdx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/xlnx,versal-net-cdx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 on run-time.
17 All devices on the CDX bus will have a unique streamid (for IOMMU)
20 are used to configure SMMU and GIC-ITS respectively.
22 iommu-map property is used to define the set of stream ids
23 corresponding to each device and the associated IOMMU.
26 The msi-map property is used to associate the devices with the
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| /freebsd/sys/contrib/device-tree/src/arm64/apple/ |
| H A D | t600x-die0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 nco: clock-controller@28e03c000 {
11 compatible = "apple,t6000-nco", "apple,nco";
14 #clock-cells = <1>;
17 aic: interrupt-controller@28e100000 {
18 compatible = "apple,t6000-aic", "apple,aic2";
19 #interrupt-cells = <4>;
20 interrupt-controller;
23 reg-names = "core", "event";
24 power-domains = <&ps_aic>;
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| H A D | t8112.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
14 #include <dt-bindings/spmi/spmi.h>
17 compatible = "apple,t8112", "apple,arm-platform";
19 #address-cells = <2>;
20 #size-cells = <2>;
23 #address-cells = <2>;
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| /freebsd/sys/powerpc/pseries/ |
| H A D | plpar_iommu.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
42 #include <powerpc/pseries/phyp-hvcall.h>
45 MALLOC_DEFINE(M_PHYPIOMMU, "iommu", "IOMMU data for PAPR LPARs");
55 static int papr_supports_stuff_tce = -1;
65 struct iommu_map *map; member
80 if (ofw_bus_has_prop(p, "ibm,my-dma-window")) in phyp_iommu_set_dma_tag()
82 if (ofw_bus_has_prop(p, "ibm,dma-window")) in phyp_iommu_set_dma_tag()
90 if (OF_getencprop(node, "ibm,#dma-size-cells", &dma_scells, in phyp_iommu_set_dma_tag()
92 OF_searchencprop(node, "#size-cells", &dma_scells, in phyp_iommu_set_dma_tag()
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| /freebsd/sys/powerpc/powerpc/ |
| H A D | busdma_machdep.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
78 device_t iommu; member
102 #define dmat_alignment(dmat) ((dmat)->alignment)
104 #define dmat_boundary(dmat) ((dmat)->boundary)
105 #define dmat_flags(dmat) ((dmat)->flags)
106 #define dmat_highaddr(dmat) ((dmat)->highaddr)
107 #define dmat_lowaddr(dmat) ((dmat)->lowaddr)
108 #define dmat_lockfunc(dmat) ((dmat)->lockfunc)
109 #define dmat_lockfuncarg(dmat) ((dmat)->lockfuncarg)
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| /freebsd/sys/contrib/device-tree/src/powerpc/fsl/ |
| H A D | p5020si-post.dtsi | 4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10000 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10000 0>;
51 compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
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| H A D | p3041si-post.dtsi | 4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10 0>;
51 compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
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| H A D | p2041si-post.dtsi | 4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10 0>;
51 compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
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| H A D | p5040si-post.dtsi | 4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10000 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10000 0>;
51 compatible = "fsl,p5040-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
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| H A D | p4080si-post.dtsi | 4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10 0>;
51 compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
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| /freebsd/sys/contrib/device-tree/Bindings/reserved-memory/ |
| H A D | reserved-memory.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reserved-memory/reserved-memory.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: /reserved-memory Child Node Common
10 - devicetree-spec@vger.kernel.org
13 Reserved memory is specified as a node under the /reserved-memory node. The
19 Each child of the reserved-memory node specifies one or more regions
25 Following the generic-names recommended practice, node names should
26 reflect the purpose of the node (ie. "framebuffer" or "dma-pool").
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| /freebsd/sys/arm64/iommu/ |
| H A D | iommu_if.m | 1 #-
2 # SPDX-License-Identifier: BSD-2-Clause
8 # Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
44 #include <dev/iommu/iommu.h>
52 INTERFACE iommu;
55 # Check if the iommu controller dev is responsible to serve traffic
64 # Map a virtual address VA to a physical address PA.
66 METHOD int map {
86 # Allocate an IOMMU domain.
90 struct iommu_unit *iommu;
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| H A D | iommu.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
8 * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
54 #include <dev/iommu/busdma_iommu.h>
63 #include "iommu.h"
66 static MALLOC_DEFINE(M_IOMMU, "IOMMU", "IOMMU framework");
77 struct iommu_unit *iommu; member
86 struct iommu_unit *iommu; in iommu_domain_unmap_buf() local
89 iommu = iodom->iommu; in iommu_domain_unmap_buf()
90 error = IOMMU_UNMAP(iommu->dev, iodom, entry->start, entry->end - in iommu_domain_unmap_buf()
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| /freebsd/sys/contrib/device-tree/src/arm64/arm/ |
| H A D | juno-base.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include "juno-clocks.dtsi"
3 #include "juno-motherboard.dtsi"
11 compatible = "arm,armv7-timer-mem";
13 clock-frequency = <50000000>;
14 #address-cells = <1>;
15 #size-cells = <1>;
19 frame-number = <1>;
31 #mbox-cells = <1>;
33 clock-names = "apb_pclk";
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| /freebsd/sys/contrib/device-tree/src/arm64/amd/ |
| H A D | amd-seattle-soc.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
10 interrupt-parent = <&gic0>;
11 #address-cells = <2>;
12 #size-cells = <2>;
14 gic0: interrupt-controller@e1101000 {
15 compatible = "arm,gic-400", "arm,cortex-a15-gic";
16 interrupt-controller;
17 #interrupt-cells = <3>;
18 #address-cells = <2>;
19 #size-cells = <2>;
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