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/freebsd/sys/contrib/device-tree/Bindings/arm/tegra/
H A Dnvidia,tegra186-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra186-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra186-pmc
17 - nvidia,tegra194-pmc
18 - nvidia,tegra234-pmc
24 reg-names:
[all …]
H A Dnvidia,tegra186-pmc.txt4 - compatible: Should contain one of the following:
5 - "nvidia,tegra186-pmc": for Tegra186
6 - "nvidia,tegra194-pmc": for Tegra194
7 - "nvidia,tegra234-pmc": for Tegra234
8 - reg: Must contain an (offset, length) pair of the register set for each
9 entry in reg-names.
10 - reg-names: Must include the following entries:
11 - "pmc"
12 - "wake"
13 - "aotag"
[all …]
H A Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
19 - nvidia,tegra124-pmc
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra210-p2571.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra210-p2530.dtsi"
12 pinctrl-names = "boot";
13 pinctrl-0 = <&state_boot>;
20 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
21 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
22 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
29 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
[all …]
H A Dtegra210-p2595.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
10 pinctrl-names = "boot";
11 pinctrl-0 = <&state_boot>;
19 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
20 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
21 nvidia,io-hv = <TEGRA_PIN_ENABLE>;
28 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
29 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
30 nvidia,io-hv = <TEGRA_PIN_ENABLE>;
[all …]
H A Dtegra210-p2597.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
23 avdd-dsi-csi-supply = <&vdd_dsi_csi>;
33 avdd-io-hdmi-dp-supply = <&avdd_1v05>;
34 vdd-hdmi-dp-pll-supply = <&vdd_1v8>;
35 hdmi-supply = <&vdd_hdmi>;
37 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
38 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(CC, 1)
[all …]
H A Dtegra210-p2894.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/mfd/max77620.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
16 stdout-pat
[all...]
H A Dtegra210-smaug.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/mfd/max77620.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
12 compatible = "google,smaug-rev8", "google,smaug-rev7",
13 "google,smaug-rev6", "google,smaug-rev5",
14 "google,smaug-rev4", "google,smaug-rev3",
15 "google,smaug-rev2", "google,smaug-rev1",
25 stdout-path = "serial0:115200n8";
[all …]
H A Dtegra186.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra186-clock.h>
3 #include <dt-bindings/gpio/tegra186-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gi
[all...]
H A Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gi
[all...]
/freebsd/sys/contrib/device-tree/Bindings/soc/tegra/
H A Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
19 - nvidia,tegra124-pmc
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dnvidia,tegra194-pinmux.txt4 - compatible: "nvidia,tegra194-pinmux"
5 - reg: Should contain a list of base address and size pairs for:
6 - first entry: The APB_MISC_GP_*_PADCTRL registers (pad control)
7 - second entry: The PINMUX_AUX_* registers (pinmux)
9 Please refer to pinctrl-bindings.txt in this directory for details of the
17 parameters, such as pull-up, tristate, drive strength, etc.
21 include/dt-binding/pinctrl/pinctrl-tegra.h.
23 Required subnode-properties:
24 - nvidia,pins : An array of strings. Each string contains the name of a pin or
27 Optional subnode-properties:
[all …]
H A Dnvidia,tegra210-pinmux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra210-pinmu
[all...]
H A Dnvidia,tegra194-pinmux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra194-pinmu
[all...]
H A Dnvidia,tegra210-pinmux.txt4 - compatible: "nvidia,tegra210-pinmux"
5 - reg: Should contain a list of base address and size pairs for:
6 - first entry: The APB_MISC_GP_*_PADCTRL registers (pad control)
7 - second entry: The PINMUX_AUX_* registers (pinmux)
9 Please refer to pinctrl-bindings.txt in this directory for details of the
17 parameters, such as pull-up, tristate, drive strength, etc.
33 include/dt-binding/pinctrl/pinctrl-tegra.h.
35 Required subnode-properties:
36 - nvidia,pins : An array of strings. Each string contains the name of a pin or
39 Optional subnode-properties:
[all …]
H A Dnvidia,tegra234-pinmux-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra234-pinmux-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
13 $ref: nvidia,tegra-pinmux-common.yaml
33 nvidia,enable-input: true
34 nvidia,open-drain: true
36 nvidia,drive-type: true
[all …]
H A Dnvidia,tegra234-pinmux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra234-pinmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 const: nvidia,tegra234-pinmux
21 "^pinmux(-[a-z0-9-]+)?$":
26 $ref: nvidia,tegra234-pinmux-common.yaml
121 - |
[all …]
H A Dnvidia,tegra-pinmux-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra-pinmux-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
14 Please refer to pinctrl-bindings.txt in this directory for details of the
22 pin configuration parameters, such as pull-up, tristate, drive strength,
46 $ref: /schemas/types.yaml#/definitions/string-array
57 description: Pull-down/up setting to apply to the pin.
[all …]
/freebsd/sys/netpfil/ipfilter/netinet/
H A Dip_sync.c151 softs->ipf_sync_log_sz = SYNCLOG_SZ; in ipf_sync_soft_create()
152 softs->ipf_sync_nat_tab_sz = SYNC_STATETABSZ; in ipf_sync_soft_create()
153 softs->ipf_sync_state_tab_sz = SYNC_STATETABSZ; in ipf_sync_soft_create()
154 softs->ipf_sync_event_high_wm = SYNCLOG_SZ * 100 / 90; /* 90% */ in ipf_sync_soft_create()
155 softs->ipf_sync_queue_high_wm = SYNCLOG_SZ * 100 / 90; /* 90% */ in ipf_sync_soft_create()
161 /* ------------------------------------------------------------------------ */
163 /* Returns: int - 0 == success, -1 == failure */
168 /* ------------------------------------------------------------------------ */
174 KMALLOCS(softs->synclog, synclogent_t *, in ipf_sync_soft_init()
175 softs->ipf_sync_log_sz * sizeof(*softs->synclog)); in ipf_sync_soft_init()
[all …]
H A Dip_state.c135 #define SINCL(x) ATOMIC_INCL(softs->x)
136 #define SBUMP(x) (softs->x)++
137 #define SBUMPD(x, y) do { (softs->x.y)++; DT(y); } while (0)
138 #define SBUMPDX(x, y, z)do { (softs->x.y)++; DT(z); } while (0)
181 #define DOUBLE_HASH(x) (((x) + softs->ipf_state_seed[(x) % \
182 softs->ipf_state_size]) % softs->ipf_state_size)
185 /* ------------------------------------------------------------------------ */
187 /* Returns: int - 0 == success, -1 == failure */
190 /* A null-op function that exists as a placeholder so that the flow in */
192 /* ------------------------------------------------------------------------ */
[all …]
H A Dip_nat.c110 #define NATFSUM(n,v,f) ((v) == 4 ? (n)->f.in4.s_addr : (n)->f.i6[0] + \
111 (n)->f.i6[1] + (n)->f.i6[2] + (n)->f.i6[3])
112 #define NBUMP(x) softn->(x)++
114 softn->x.y++; \
117 #define NBUMPSIDE(y,x) softn->ipf_nat_stats.ns_side[y].x++
118 #define NBUMPSIDED(y,x) do { softn->ipf_nat_stats.ns_side[y].x++; \
121 do { softn->ipf_nat_stats.ns_side[y].x++; \
123 #define NBUMPSIDEDF(y,x)do { softn->ipf_nat_stats.ns_side[y].x++; \
182 /* -------------------- -+- ------------------------------------- */
184 /* ------------> | ------------> */
[all …]
/freebsd/sys/cam/mmc/
H A Dmmc_xpt.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
64 FEATURE(mmccam, "CAM-based MMC/SD/SDIO stack");
137 CAM_DEBUG((softc)->periph->path, CAM_DEBUG_PROBE, \
138 ("Probe %s to %s\n", text[(softc)->action], \
140 (softc)->action = (newaction); \
184 /* XPort functions -- an interface to CAM at periph side */
195 device->quirk = NULL; in mmc_alloc_device()
196 device->mintags = 0; in mmc_alloc_device()
197 device->maxtags = 0; in mmc_alloc_device()
[all …]
/freebsd/sys/arm64/nvidia/tegra210/
H A Dtegra210_pinmux.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
78 {"nvidia,tegra210-pinmux", 1},
109 {"nvidia,enable-input", PROP_ID_ENABLE_INPUT},
110 {"nvidia,open-drain", PROP_ID_OPEN_DRAIN},
112 {"nvidia,io-reset", PROP_ID_IORESET},
113 {"nvidia,rcv-sel", PROP_ID_RCV_SEL},
114 {"nvidia,io-hv", PROP_ID_RCV_SEL},
115 {"nvidia,high-speed-mode", PROP_ID_HIGH_SPEED_MODE},
117 {"nvidia,low-power-mode", PROP_ID_LOW_POWER_MODE},
[all …]
/freebsd/sys/contrib/openzfs/module/zfs/
H A Ddbuf.c9 * or https://opensource.org/licenses/CDDL-1.0.
165 DBUF_STAT_INCR(stat, -(val))
169 DBUF_STAT_INCR(stat, -1)
195 * 1. Cache of metadata dbufs, to help make read-heavy administrative commands
199 * pool, to short-circuit as much I/O as possible for all administrative
216 * from the cache and later re-added to the head of the cache.
244 * The LRU dbuf cache uses a three-stage eviction policy:
245 * - A low water marker designates when the dbuf eviction thread
247 * - When we reach the maximum size (aka mid water mark), we
249 * - The high water mark indicates when the eviction thread
[all …]
/freebsd/sys/x86/x86/
H A Didentcpu.c1 /*-
71 #include <xen/xen-os.h>
151 if ((req->flags & SCTL_MASK32) != 0 && adaptive_machine_arch) in sysctl_hw_machine()
310 "DX2 Write-Back Enhanced"); in printcpuinfo()
322 strcat(cpu_model, " A-step"); in printcpuinfo()
340 strcat(cpu_model, "/P55C (quarter-micron)"); in printcpuinfo()
348 * XXX - If/when Intel fixes the bug, this in printcpuinfo()
359 strcat(cpu_model, "Pentium Pro A-step"); in printcpuinfo()
423 strcat(cpu_model, "Enhanced Am486DX2 Write-Through"); in printcpuinfo()
426 strcat(cpu_model, "Enhanced Am486DX2 Write-Back"); in printcpuinfo()
[all …]

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