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/linux/tools/perf/pmu-events/arch/s390/cf_z13/
H A Dextended.json112 …tory where the returned cache line was sourced from an On-Chip Level-3 cache without intervention."
118 "BriefDescription": "L1D On-Chip L3 Sourced Writes with Intervention",
119 …rectory where the returned cache line was sourced from an On-Chip Level-3 cache with intervention."
132 "BriefDescription": "L1D On-Node L3 Sourced Writes with Intervention",
133 …rectory where the returned cache line was sourced from an On-Node Level-3 cache with intervention."
140 …tory where the returned cache line was sourced from an On-Node Level-3 cache without intervention."
153 "BriefDescription": "L1D On-Drawer L3 Sourced Writes with Intervention",
154 …ctory where the returned cache line was sourced from an On-Drawer Level-3 cache with intervention."
161 …ry where the returned cache line was sourced from an On-Drawer Level-3 cache without intervention."
174 "BriefDescription": "L1D Off-Drawer Same-Column L3 Sourced Writes with Intervention",
[all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z14/
H A Dextended.json112 …tory where the returned cache line was sourced from an On-Chip Level-3 cache without intervention."
125 "BriefDescription": "L1D On-Chip L3 Sourced Writes with Intervention",
126 …rectory where the returned cache line was sourced from an On-Chip Level-3 cache with intervention."
133 …tory where the returned cache line was sourced from On-Cluster Level-3 cache without intervention."
146 "BriefDescription": "L1D On-Cluster L3 Sourced Writes with Intervention",
147 …tory where the returned cache line was sourced from an On-Cluster Level-3 cache with intervention."
154 … where the returned cache line was sourced from an Off-Cluster Level-3 cache without intervention."
167 "BriefDescription": "L1D Off-Cluster L3 Sourced Writes with Intervention",
168 …ory where the returned cache line was sourced from an Off-Cluster Level-3 cache with intervention."
175 …y where the returned cache line was sourced from an Off-Drawer Level-3 cache without intervention."
[all …]
/linux/tools/perf/pmu-events/arch/s390/cf_zec12/
H A Dextended.json105 …tory where the returned cache line was sourced from an On Chip Level-3 cache without intervention."
112 …e the returned cache line was sourced from an Off Chip/On Book Level-3 cache without intervention."
119 …ory where the returned cache line was sourced from an Off Book Level-3 cache without intervention."
146 "BriefDescription": "L1D On-Chip L3 Sourced Writes with Intervention",
147 …irectory where the returned cache line was sourced from a On Chip Level-3 cache with intervention."
153 "BriefDescription": "L1D Off-Chip L3 Sourced Writes with Intervention",
154 …here the returned cache line was sourced from an Off Chip/On Book Level-3 cache with intervention."
160 "BriefDescription": "L1D Off-Book L3 Sourced Writes with Intervention",
161 …ectory where the returned cache line was sourced from an Off Book Level-3 cache with intervention."
168 …tory where the returned cache line was sourced from an On Chip Level-3 cache without intervention."
[all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z15/
H A Dextended.json112 …tory where the returned cache line was sourced from an On-Chip Level-3 cache without intervention."
125 "BriefDescription": "L1D On-Chip L3 Sourced Writes with Intervention",
126 …rectory where the returned cache line was sourced from an On-Chip Level-3 cache with intervention."
133 …tory where the returned cache line was sourced from On-Cluster Level-3 cache without intervention."
146 "BriefDescription": "L1D On-Cluster L3 Sourced Writes with Intervention",
147 …tory where the returned cache line was sourced from an On-Cluster Level-3 cache with intervention."
154 … where the returned cache line was sourced from an Off-Cluster Level-3 cache without intervention."
167 "BriefDescription": "L1D Off-Cluster L3 Sourced Writes with Intervention",
168 …ory where the returned cache line was sourced from an Off-Cluster Level-3 cache with intervention."
175 …y where the returned cache line was sourced from an Off-Drawer Level-3 cache without intervention."
[all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z16/
H A Dextended.json104 "BriefDescription": "Directory Write Level 1 Data Cache from L2-Cache with Intervention",
105 …ory where the returned cache line was sourced from the requestors Level-2 cache with intervention."
132 "BriefDescription": "Directory Write Level 1 Data Cache from On-Chip L2-Cache with Intervention",
133 …rectory where the returned cache line was sourced from an On-Chip Level-2 cache with intervention."
202 …rectory Write Level 1 Instruction and Data Cache from On-Module Memory L2-Cache with Intervention",
203 …ctory where the returned cache line was sourced from an On-Module Level-2 cache with intervention."
223 …n": "Directory Write Level 1 Instruction and Data Cache from On-Drawer L2-Cache with Intervention",
224 …ctory where the returned cache line was sourced from an On-Drawer Level-2 cache with intervention."
244 …": "Directory Write Level 1 Instruction and Data Cache from Off-Drawer L2-Cache with Intervention",
245 …tory where the returned cache line was sourced from an Off-Drawer Level-2 cache with intervention."
[all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z17/
H A Dextended.json104 "BriefDescription": "Directory Write Level 1 Data Cache from L2-Cache with Intervention",
105 …ory where the returned cache line was sourced from the requestors Level-2 cache with intervention."
132 "BriefDescription": "Directory Write Level 1 Data Cache from On-Chip L2-Cache with Intervention",
133 …rectory where the returned cache line was sourced from an On-Chip Level-2 cache with intervention."
202 …rectory Write Level 1 Instruction and Data Cache from On-Module Memory L2-Cache with Intervention",
203 …ctory where the returned cache line was sourced from an On-Module Level-2 cache with intervention."
223 …n": "Directory Write Level 1 Instruction and Data Cache from On-Drawer L2-Cache with Intervention",
224 …ctory where the returned cache line was sourced from an On-Drawer Level-2 cache with intervention."
244 …": "Directory Write Level 1 Instruction and Data Cache from Off-Drawer L2-Cache with Intervention",
245 …tory where the returned cache line was sourced from an Off-Drawer Level-2 cache with intervention."
[all …]
/linux/sound/soc/qcom/qdsp6/
H A Dq6dsp-errno.h37 /* Operation requests intervention to complete. */
39 /* Operation requests immediate intervention to complete. */
/linux/tools/perf/pmu-events/arch/powerpc/power8/
H A Dmarked.json323 "BriefDescription": "Combined Intervention event",
563 "BriefDescription": "Sampled Read got a T intervention",
713 "BriefDescription": "marked store finished with intervention",
714 "PublicDescription": "marked store complete (data home) with intervention"
/linux/Documentation/locking/
H A Drobust-futex-ABI.rst13 are taken and dropped, without kernel intervention. The only additional
14 kernel intervention required for robust_futexes above and beyond what is
/linux/Documentation/devicetree/bindings/dma/
H A Dnvidia,tegra20-apbdma.yaml13 CPU intervention.
/linux/Documentation/hwmon/
H A Dadt7462.rst31 response to the measured temperatures without further host intervention. This
H A Dadt7470.rst31 response to the measured temperatures with further host intervention. This
H A Dadt7475.rst66 response to the measured temperatures without further host intervention.
/linux/Documentation/virt/kvm/
H A Dppc-pv.rst127 The MSR contains bits that require hypervisor intervention and bits that do
128 not require direct hypervisor intervention because they only get interpreted
/linux/Documentation/PCI/
H A Dpcieaer-howto.rst124 intervention or any loss of data. These errors are detected and
176 software intervention or any loss of data. These errors do not
/linux/Documentation/scsi/
H A Dlpfc.rst40 device would be taken offline. Manual intervention would be required to
/linux/tools/perf/pmu-events/arch/powerpc/power9/
H A Dpmc.json15 "BriefDescription": "Combined Intervention event"
/linux/tools/perf/pmu-events/arch/x86/broadwellx/
H A Dfloating-point.json121 …d. Counting includes only cases involving penalties that required micro-code assist intervention.",
130 …alid. Counting covers only cases involving penalties that require micro-code assist intervention.",
/linux/drivers/scsi/device_handler/
H A Dscsi_dh_emc.c123 * LUN Not Ready - Manual Intervention Required in trespass_endio()
293 * LUN Not Ready - Manual Intervention Required in clariion_check_sense()
H A Dscsi_dh_hp_sw.c137 * LUN not ready - manual intervention required in hp_sw_start_stop()
/linux/tools/perf/pmu-events/arch/x86/broadwellde/
H A Dfloating-point.json121 …d. Counting includes only cases involving penalties that required micro-code assist intervention.",
130 …alid. Counting covers only cases involving penalties that require micro-code assist intervention.",
/linux/tools/perf/pmu-events/arch/x86/broadwell/
H A Dfloating-point.json121 …d. Counting includes only cases involving penalties that required micro-code assist intervention.",
130 …alid. Counting covers only cases involving penalties that require micro-code assist intervention.",
/linux/Documentation/admin-guide/nfs/
H A Dnfs-client.rst31 Without any other intervention, the Linux client uses a string that contains
/linux/Documentation/virt/kvm/s390/
H A Ds390-pv.rst61 intervention was requested and those are now enabled.
/linux/Documentation/arch/arm/
H A Dkernel_mode_neon.rst22 exception like the normal register file is, so some manual intervention is

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