| /freebsd/sys/contrib/device-tree/src/arm64/nuvoton/ |
| H A D | ma35d1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 * Author: Shan-Chun Hung <schung@nuvoton.com> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/clock/nuvoton,ma35d1-clk.h> 12 #include <dt-bindings/reset/nuvoton,ma35d1-reset.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; [all …]
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| H A D | nuvoton-common-npcm8xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include <dt-bindings/clock/nuvoton,npcm845-clk.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/interrupt-controller/irq.h> 9 #address-cells = <2>; 10 #size-cells = <2>; 11 interrupt-parent = <&gic>; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 compatible = "simple-bus"; [all …]
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| /freebsd/sys/contrib/device-tree/src/riscv/sophgo/ |
| H A D | sg2044.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 #include <dt-bindings/clock/sophgo,sg2044-pll.h> 7 #include <dt-bindings/clock/sophgo,sg2044-clk.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/pinctrl/pinctrl-sg2044.h> 12 #include "sg2044-cpus.dtsi" 13 #include "sg2044-reset.h" 24 compatible = "fixed-clock"; 25 clock-output-names = "osc"; [all …]
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| H A D | cv18xx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 #include <dt-bindings/clock/sophgo,cv1800.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 16 #address-cells = <1>; 17 #size-cells = <0>; 18 timebase-frequency = <25000000>; 24 d-cache-block-size = <64>; [all …]
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| H A D | cv180x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 #include <dt-bindings/clock/sophgo,cv1800.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include "cv18xx-reset.h" 13 #address-cells = <1>; 14 #size-cells = <1>; 17 compatible = "fixed-clock"; 18 clock-output-names = "osc_25m"; 19 #clock-cells = <0>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/marvell/ |
| H A D | armada-cp11x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/interrupt-controller/mvebu-icu.h> 9 #include <dt-bindings/thermal/thermal.h> 11 #include "armada-common.dtsi" 27 thermal-zones { 28 CP11X_LABEL(thermal_ic): CP11X_NODE_NAME(ic-thermal) { 29 polling-delay-passive = <0>; /* Interrupt driven */ 30 polling-delay = <0>; /* Interrupt driven */ 32 thermal-sensors = <&CP11X_LABEL(thermal) 0>; 42 cooling-maps { }; [all …]
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| /freebsd/sys/contrib/device-tree/src/loongarch/ |
| H A D | loongson-2k0500.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/clock/loongson,ls2k-clk.h> 12 #address-cells = <2>; 13 #size-cells = <2>; 16 #address-cells = <1>; 17 #size-cells = <0>; 23 clocks = <&clk LOONGSON2_NODE_CLK>; 27 ref_100m: clock-ref-100m { [all …]
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| H A D | loongson-2k1000.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/clock/loongson,ls2k-clk.h> 10 #include <dt-bindings/gpio/gpio.h> 13 #address-cells = <2>; 14 #size-cells = <2>; 17 #address-cells = <1>; 18 #size-cells = <0>; 24 clocks = <&clk LOONGSON2_NODE_CLK>; [all …]
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| H A D | loongson-2k2000.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/clock/loongson,ls2k-clk.h> 12 #address-cells = <2>; 13 #size-cells = <2>; 16 #address-cells = <1>; 17 #size-cells = <0>; 23 clocks = <&clk LOONGSON2_NODE_CLK>; 30 clocks = <&clk LOONGSON2_NODE_CLK>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/nxp/lpc/ |
| H A D | lpc32xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * Copyright (C) 2015-2019 Vladimir Zapolskiy <vz@mleia.com> 9 #include <dt-bindings/clock/lpc32xx-clock.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 16 interrupt-parent = <&mic>; 19 #address-cells = <1>; 20 #size-cells = <0>; 23 compatible = "arm,arm926ej-s"; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | imx8-ss-lsio.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2020 NXP 7 #include <dt-bindings/clock/imx8-lpcg.h> 8 #include <dt-bindings/firmware/imx/rsrc.h> 10 lsio_bus_clk: clock-lsio-bus { 11 compatible = "fixed-clock"; 12 #clock-cells = <0>; 13 clock-frequency = <100000000>; 14 clock-output-names = "lsio_bus_clk"; 18 compatible = "simple-bus"; [all …]
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| H A D | imx8mq.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de> 7 #include <dt-bindings/clock/imx8mq-clock.h> 8 #include <dt-bindings/power/imx8mq-power.h> 9 #include <dt-bindings/reset/imx8mq-reset.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include "dt-bindings/input/input.h" 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 14 #include <dt-bindings/interconnect/imx8mq.h> [all …]
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| H A D | imx8mm.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mm-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/imx8mm-power.h> 11 #include <dt-bindings/reset/imx8mq-reset.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx8mm-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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| H A D | imx8mn.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mn-clock.h> 7 #include <dt-bindings/power/imx8mn-power.h> 8 #include <dt-bindings/reset/imx8mq-reset.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx8mn-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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| H A D | imx8mp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mp-clock.h> 7 #include <dt-bindings/power/imx8mp-power.h> 8 #include <dt-bindings/reset/imx8mp-reset.h> 9 #include <dt-bindings/reset/imx8mp-reset-audiomix.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/interconnect/fsl,imx8mp.h> 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 #include <dt-bindings/thermal/thermal.h> [all …]
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| H A D | imx93.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx93-clock.h> 7 #include <dt-bindings/dma/fsl-edma.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/power/fsl,imx93-power.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx93-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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| H A D | imx8-ss-img.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2019-2021 NXP 6 img_ipg_clk: clock-img-ipg { 7 compatible = "fixed-clock"; 8 #clock-cells = <0>; 9 clock-frequency = <200000000>; 10 clock-output-names = "img_ipg_clk"; 13 img_pxl_clk: clock-img-pxl { 14 compatible = "fixed-clock"; 15 #clock-cells = <0>; [all …]
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| /freebsd/sys/contrib/device-tree/src/riscv/thead/ |
| H A D | th1520.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/clock/thead,th1520-clk-ap.h> 9 #include <dt-bindings/power/thead,th1520-power.h> 10 #include <dt-bindings/reset/thead,th1520-reset.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 18 #address-cells = <1>; 19 #size-cells = <0>; 20 timebase-frequency = <3000000>; [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/display/imx/ |
| H A D | nxp,imx8mq-dcss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/display/imx/nxp,imx8mq-dcss.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Laurentiu Palcu <laurentiu.palcu@nxp.com> 17 2.2) or MIPI-DSI. The DCSS is intended to support up to 4kp60 displays. HDR10 23 const: nxp,imx8mq-dcss 27 - description: DCSS base address and size, up to IRQ steer start 28 - description: DCSS BLKCTL base address and size 32 - description: Context loader completion and error interrupt [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/intel/socfpga/ |
| H A D | socfpga_arria10.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/reset/altr,rst-mgr-a10.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 #address-cells = <1>; 15 #size-cells = <0>; 16 enable-method = "altr,socfpga-a10-smp"; 19 compatible = "arm,cortex-a9"; 22 next-level-cache = <&L2>; [all …]
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| H A D | socfpga.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/reset/altr,rst-mgr.h> 9 #address-cells = <1>; 10 #size-cells = <1>; 22 #address-cells = <1>; 23 #size-cells = <0>; 24 enable-metho [all...] |
| /freebsd/sys/contrib/device-tree/src/arm64/bitmain/ |
| H A D | bm1880.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/clock/bm1880-clock.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-binding 104 clk: clock-controller@e8 { global() label [all...] |
| /freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
| H A D | mt7981b.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 #include <dt-bindings/clock/mediatek,mt7981-clk.h> 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/reset/mt7986-resets.h> 9 interrupt-parent = <&gic>; 10 #address-cells = <2>; 11 #size-cells = <2>; 14 #address-cells = <1>; 15 #size-cells = <0>; 18 compatible = "arm,cortex-a53"; [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | pinctrl-st.txt | 3 Each multi-function pin is controlled, driven and routed through the 5 and multiple alternate functions(ALT1 - ALTx) that directly connect 14 GPIO bank can have one of the two possible types of interrupt-wirings. 16 First type is via irqmux, single interrupt is used by multiple gpio banks. This 20 | |----> [gpio-bank (n) ] 21 | |----> [gpio-bank (n + 1)] 22 [irqN]-- | irq-mux |----> [gpio-bank (n + 2)] 23 | |----> [gpio-bank (... )] 24 |_________|----> [gpio-bank (n + 7)] 26 Second type has a dedicated interrupt per gpio bank. [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/zte/ |
| H A D | zx296718.dtsi | 5 * This file is dual-licensed: you can use it either under the terms 44 #include <dt-bindings/input/input.h> 45 #include <dt-bindings/interrupt-controller/arm-gic.h> 46 #include <dt-bindings/gpio/gpio.h> 47 #include <dt-bindings/clock/zx296718-clock.h> 51 #address-cells = <1>; 52 #size-cells = <1>; 53 interrupt-parent = <&gic>; 67 #address-cells = <2>; 68 #size-cells = <0>; [all …]
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