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/linux/arch/x86/mm/
H A Dmem_encrypt_boot.S29 * - intermediate copy buffer (PMD_SIZE)
58 addq $PAGE_SIZE, %r8 /* Workarea intermediate copy buffer */
88 * R8 - intermediate copy buffer
93 * memory space to an intermediate buffer and then copying from the
94 * intermediate buffer back to the encrypted memory space. The physical
134 movq %r8, %rdi /* Dest - intermediate copy buffer */
138 movq %r8, %rsi /* Source - intermediate copy buffer */
/linux/arch/s390/lib/
H A Dcrc32be-vx.c47 * intermediate results with a single VECTOR GALOIS FIELD MULTIPLY instruction.
75 * V0: Initial CRC value and intermediate constants and results.
101 * the reduction constants in V0. The intermediate result is in crc32_be_vgfm_16()
130 * form an intermediate 96-bit value (with appended zeros) which is then in crc32_be_vgfm_16()
131 * XORed with the intermediate reduction result. in crc32_be_vgfm_16()
138 * intermediate result is then XORed with the product of the leftmost in crc32_be_vgfm_16()
159 * with zero to not contribute to the intermediate results. in crc32_be_vgfm_16()
168 * V2 and XOR the intermediate result, T2(x), with the value in V1. in crc32_be_vgfm_16()
H A Dcrc32le-vx.c86 * V0: Initial CRC value and intermediate constants and results.
126 * the R1 and R2 reduction constants in V0. The intermediate in crc32_le_vgfm_generic()
176 * Implicitly, the intermediate leftmost product becomes padded in crc32_le_vgfm_generic()
213 * CONST_RU_POLY is zero and, thus, the intermediate GF(2) product in crc32_le_vgfm_generic()
223 * V2 and XOR the intermediate result, T2(x), with the value in V1. in crc32_le_vgfm_generic()
/linux/Documentation/devicetree/bindings/cpufreq/
H A Dcpufreq-mediatek.txt8 "intermediate" - A parent of "cpu" clock which is used as "intermediate" clock
72 clock-names = "cpu", "intermediate";
194 clock-names = "cpu", "intermediate";
206 clock-names = "cpu", "intermediate";
218 clock-names = "cpu", "intermediate";
230 clock-names = "cpu", "intermediate";
/linux/drivers/net/wwan/iosm/
H A Diosm_ipc_pm.h38 * @IPC_MEM_HOST_PM_ACTIVE_WAIT: Intermediate state before going to
40 * @IPC_MEM_HOST_PM_SLEEP_WAIT_IDLE: Intermediate state to wait for idle
42 * @IPC_MEM_HOST_PM_SLEEP_WAIT_D3: Intermediate state to wait for D3
46 * @IPC_MEM_HOST_PM_SLEEP_WAIT_EXIT_SLEEP: Intermediate state before exiting
70 * @IPC_MEM_DEV_PM_ACTIVE_WAIT: Local intermediate states.
/linux/drivers/gpu/drm/i915/display/
H A Di9xx_wm.c1289 struct g4x_wm_state *intermediate = &new_crtc_state->wm.g4x.intermediate; in g4x_compute_intermediate_wm() local
1296 *intermediate = *optimal; in g4x_compute_intermediate_wm()
1298 intermediate->cxsr = false; in g4x_compute_intermediate_wm()
1299 intermediate->hpll_en = false; in g4x_compute_intermediate_wm()
1303 intermediate->cxsr = optimal->cxsr && active->cxsr && in g4x_compute_intermediate_wm()
1305 intermediate->hpll_en = optimal->hpll_en && active->hpll_en && in g4x_compute_intermediate_wm()
1307 intermediate->fbc_en = optimal->fbc_en && active->fbc_en; in g4x_compute_intermediate_wm()
1310 intermediate->wm.plane[plane_id] = in g4x_compute_intermediate_wm()
1314 drm_WARN_ON(&dev_priv->drm, intermediate->wm.plane[plane_id] > in g4x_compute_intermediate_wm()
1318 intermediate->sr.plane = max(optimal->sr.plane, in g4x_compute_intermediate_wm()
[all …]
/linux/kernel/bpf/
H A Dlpm_trie.c20 /* Intermediate node */
141 * An intermediate node will be turned into a 'real' node on demand. In the
149 * downwards. The last node in the traversal that is a non-intermediate one is
271 * artificially added intermediate one. in trie_lookup_elem()
355 * an intermediate node. in trie_update_elem()
441 /* Finally, assign the intermediate node to the determined slot */ in trie_update_elem()
505 * as intermediate and we are done. in trie_delete_elem()
513 /* If the parent of the node we are about to delete is an intermediate in trie_delete_elem()
515 * the intermediate parent as well and promote its other child in trie_delete_elem()
517 * intermediate nodes have exactly 2 children and that there are no in trie_delete_elem()
[all …]
/linux/Documentation/power/powercap/
H A Ddtpm.rst115 hierarchically. There is one root node, all intermediate nodes are
116 grouping the child nodes which can be intermediate nodes also or real
119 The intermediate nodes aggregate the power information and allows to
130 intermediate node, then the power consumption will be the sum of all
197 Alternatively, if the node to be inserted is an intermediate one, then
/linux/Documentation/gpu/
H A Dtodo.rst17 Intermediate: Tasks which need some experience with working in the DRM
42 Level: Intermediate
174 Level: Intermediate
244 Level: Intermediate
279 Level: Intermediate
302 Level: Intermediate
348 Level: Intermediate
364 Level: Intermediate
378 Level: Intermediate
409 Level: Intermediate
[all …]
/linux/drivers/crypto/intel/keembay/
H A Docs-hcu.h48 * struct ocs_hcu_idata - Intermediate data generated by the HCU.
52 * contain the actual hash digest. Otherwise it is the intermediate
64 * @idata: The current intermediate data.
H A Docs-hcu.c229 * ocs_hcu_get_intermediate_data() - Get intermediate data.
231 * @data: Where to store the intermediate.
237 * Note: once all data has been processed, the intermediate data actually
279 * ocs_hcu_set_intermediate_data() - Set intermediate data.
281 * @data: The intermediate data to be set.
463 * intermediate results, in ocs_hcu_get_intermediate_data(). in ocs_hcu_ll_dma_start()
/linux/tools/testing/selftests/net/
H A Dbareudp.sh7 # UDP, without adding any intermediate header. This scripts tests several
24 # * NS1 and NS2 are the intermediate namespaces. They use a bareudp device to
187 # * prepare the ingress qdiscs in the intermediate namespaces.
215 # * route these IP addresses via the intermediate namespaces (for the MPLS
217 # * add routes for these IP addresses (or MPLS labels) in the intermediate
231 # Route the overlay addresses in the intermediate namespaces
238 # The intermediate namespaces don't have routes for the reverse path,
255 # Route the overlay addresses in the intermediate namespaces
271 # Route the MPLS packets in the intermediate namespaces
394 # Create the bareudp devices in the intermediate namespaces
/linux/Documentation/userspace-api/media/dvb/
H A Ddvb-frontend-parameters.rst34 /* intermediate frequency in kHz for QPSK */
45 intermediate frequency, i.e. the offset which is effectively added to
46 the local oscillator frequency (LOF) of the LNB. The intermediate
/linux/fs/squashfs/
H A DKconfig35 intermediate buffer and then memcopied it into the page cache.
39 If unsure, select "Decompress file data into an intermediate buffer"
42 bool "Decompress file data into an intermediate buffer"
44 Decompress file data into an intermediate buffer and then
H A Dpage_actor.c16 * an intermediate buffer, and for decompressing directly into the
23 /* Implementation of page_actor for decompressing into intermediate buffer */
/linux/Documentation/devicetree/bindings/interconnect/
H A Dmediatek,cci.yaml29 A parent of "bus" clock which is used as an intermediate clock source
36 - const: intermediate
70 clock-names = "cci", "intermediate";
/linux/drivers/devfreq/
H A Dmtk-cci-devfreq.c173 /* switch the cci clock to intermediate clock source. */ in mtk_ccifreq_target()
197 * If the new voltage is lower than the intermediate voltage or the in mtk_ccifreq_target()
274 drv->inter_clk = devm_clk_get(dev, "intermediate"); in mtk_ccifreq_probe()
278 "failed to get intermediate clk\n"); in mtk_ccifreq_probe()
332 dev_err(dev, "failed to get intermediate opp: %d\n", ret); in mtk_ccifreq_probe()
/linux/drivers/cpufreq/
H A Dmediatek-cpufreq.c250 * If the new voltage or the intermediate voltage is higher than the in mtk_cpufreq_set_target()
264 /* Reparent the CPU clock to intermediate clock. */ in mtk_cpufreq_set_target()
293 * If the new voltage is lower than the intermediate voltage or the in mtk_cpufreq_set_target()
411 info->inter_clk = clk_get(cpu_dev, "intermediate"); in mtk_cpu_dvfs_info_init()
415 "cpu%d: failed to get intermediate clk\n", cpu); in mtk_cpu_dvfs_info_init()
487 /* Search a safe voltage for intermediate frequency. */ in mtk_cpu_dvfs_info_init()
492 "cpu%d: failed to get intermediate opp\n", cpu); in mtk_cpu_dvfs_info_init()
/linux/arch/m68k/fpsp040/
H A Dx_ovfl.S6 | Overflow occurs when a floating-point intermediate result is
20 | RN Infinity with the sign of the intermediate result.
22 | intermediate result.
/linux/drivers/net/ethernet/intel/ice/
H A Dice_protocol_type.h10 * Therefore, up to 5 recipes can provide intermediate results to another one
11 * through chaining, e.g. recipes 0, 1, 2, 3 and 4 can provide intermediate
18 * intermediate results.
22 /* Total max recipes in chain recipe (including intermediate results) */
27 * can be programmed for lookup is 5 * 5 (not including intermediate results).
/linux/fs/xfs/libxfs/
H A Dxfs_cksum.h8 * Calculate the intermediate checksum for a buffer that has the CRC field
45 * Convert the intermediate checksum to the final ondisk format.
/linux/tools/testing/selftests/futex/
H A DREADME28 implemented in header files, avoiding the need to compile intermediate object
37 results are printed to stdout, while intermediate ERROR or FAIL messages are
/linux/Documentation/userspace-api/media/v4l/
H A Dext-ctrls-rf-tuner.rst14 converts that received signal to lower intermediate frequency (IF) or
83 intermediate frequency output or baseband output. Used when
H A Dpixfmt-reserved.rst239 It remains an opaque intermediate format and the MDP hardware must be
247 It is an opaque intermediate format. The used compression is lossless
257 It is an opaque intermediate format. The used compression is lossless
/linux/drivers/media/dvb-frontends/
H A Ddrxk_hard.h81 /* Intermediate power mode for DRXK, power down OFDM clock domain */
86 /* Intermediate power mode for DRXK, power down core (sysclk) */
91 /* Intermediate power mode for DRXK, power down pll (only osc runs) */

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