| /linux/Documentation/devicetree/bindings/interconnect/ |
| H A D | qcom,msm8939.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interconnect/qcom,msm8939.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm MSM8937/MSM8939/MSM8976 Network-On-Chip interconnect 10 - Konrad Dybcio <konradybcio@kernel.org> 13 The Qualcomm MSM8937/MSM8939/MSM8976 interconnect providers support 17 - $ref: qcom,rpm-common.yaml# 22 - qcom,msm8937-bimc 23 - qcom,msm8937-pcnoc [all …]
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| H A D | qcom,msm8953.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interconnect/qcom,msm8953.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm MSM8953 Network-On-Chip interconnect 10 - Barnabas Czeman <barnabas.czeman@mainlining.org> 13 The Qualcomm MSM8953 interconnect providers support adjusting the 16 See also: include/dt-bindings/interconnect/qcom,msm8953.h 21 - qcom,msm8953-bimc 22 - qcom,msm8953-pcnoc [all …]
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| H A D | qcom,sm6115.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interconnect/qcom,sm6115.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm SM6115 Network-On-Chip interconnect 10 - Konrad Dybcio <konradybcio@kernel.org> 13 The Qualcomm SM6115 interconnect providers support adjusting the 19 - qcom,sm6115-bimc 20 - qcom,sm6115-cnoc 21 - qcom,sm6115-snoc [all …]
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| H A D | qcom,qcm2290.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interconnect/qcom,qcm2290.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm QCM2290 Network-On-Chip interconnect 10 - Shawn Guo <shawn.guo@linaro.org> 13 The Qualcomm QCM2290 interconnect providers support adjusting the 17 - $ref: qcom,rpm-common.yaml# 25 - qcom,qcm2290-bimc 26 - qcom,qcm2290-cnoc [all …]
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| H A D | qcom,rpm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interconnect/qcom,rpm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm RPM Network-On-Chip Interconnect 10 - Georgi Djakov <djakov@kernel.org> 13 RPM interconnect providers support system bandwidth requirements through 18 - $ref: qcom,rpm-common.yaml# 26 - qcom,msm8909-bimc 27 - qcom,msm8909-pcnoc [all …]
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| H A D | interconnect.txt | 1 Interconnect Provider Device Tree Bindings 4 The purpose of this document is to define a common set of generic interconnect 8 = interconnect providers = 10 The interconnect provider binding is intended to represent the interconnect 11 controllers in the system. Each provider registers a set of interconnect 12 nodes, which expose the interconnect related capabilities of the interconnect 14 etc. The consumer drivers set constraints on interconnect path (or endpoints) 15 depending on the use case. Interconnect providers can also be interconnect 16 consumers, such as in the case where two network-on-chip fabrics interface 20 - compatible : contains the interconnect provider compatible string [all …]
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| H A D | qcom,msm8974.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interconnect/qcom,msm8974.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm MSM8974 Network-On-Chip Interconnect 10 - Brian Masney <masneyb@onstation.org> 13 The Qualcomm MSM8974 interconnect providers support setting system 14 bandwidth requirements between various network-on-chip fabrics. 22 - qcom,msm8974-bimc 23 - qcom,msm8974-cnoc [all …]
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| H A D | qcom,sdm660.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interconnect/qcom,sdm660.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm SDM660 Network-On-Chip interconnect 10 - Konrad Dybcio <konradybcio@kernel.org> 13 The Qualcomm SDM660 interconnect providers support adjusting the 19 - qcom,sdm660-a2noc 20 - qcom,sdm660-bimc 21 - qcom,sdm660-cnoc [all …]
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| H A D | qcom,msm8996.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interconnect/qcom,msm8996.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm MSM8996 Network-On-Chip interconnect 10 - Konrad Dybcio <konradybcio@kernel.org> 13 The Qualcomm MSM8996 interconnect providers support adjusting the 19 - qcom,msm8996-a0noc 20 - qcom,msm8996-a1noc 21 - qcom,msm8996-a2noc [all …]
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| /linux/include/dt-bindings/interconnect/ |
| H A D | qcom,msm8953.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 3 * Qualcomm MSM8953 interconnect IDs 63 /* SNOC fabric */ 82 /* SNOC-MM fabric */
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| H A D | qcom,msm8937.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 3 * Qualcomm MSM8937 interconnect IDs 64 /* SNOC fabric */ 82 /* SNOC-MM fabric */
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| H A D | qcom,msm8976.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 3 * Qualcomm MSM8976 interconnect IDs 64 /* SNOC fabric */ 84 /* SNOC-MM fabric */
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| H A D | qcom,msm8909.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 3 * Qualcomm MSM8909 interconnect IDs 68 /* SNOC fabric */
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| H A D | qcom,qcm2290.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* QCM2290 interconnect IDs */ 54 /* SNOC */
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| H A D | qcom,sdm660.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* SDM660 interconnect IDs */ 97 /* SNOC */
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| H A D | qcom,msm8996.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ 3 * Qualcomm MSM8996 interconnect IDs 135 /* SNOC */
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | sdm630.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 7 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h> 8 #include <dt-bindings/clock/qcom,gcc-sdm660.h> 9 #include <dt-bindings/clock/qcom,gpucc-sdm660.h> 10 #include <dt-bindings/clock/qcom,mmcc-sdm660.h> 11 #include <dt-bindings/clock/qcom,rpmcc.h> 12 #include <dt-bindings/firmware/qcom,scm.h> 13 #include <dt-bindings/interconnect/qcom,sdm660.h> 14 #include <dt-bindings/power/qcom-rpmpd.h> 15 #include <dt-bindings/gpio/gpio.h> [all …]
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| H A D | sm6115.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 6 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h> 7 #include <dt-bindings/clock/qcom,gcc-sm6115.h> 8 #include <dt-bindings/clock/qcom,sm6115-dispcc.h> 9 #include <dt-bindings/clock/qcom,sm6115-gpucc.h> 10 #include <dt-bindings/clock/qcom,rpmcc.h> 11 #include <dt-bindings/dma/qcom-gpi.h> 12 #include <dt-bindings/firmware/qcom,scm.h> 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/interconnect/qcom,rpm-icc.h> [all …]
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| /linux/arch/arm/boot/dts/qcom/ |
| H A D | qcom-msm8974.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/interconnect/qcom,msm8974.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h> 7 #include <dt-bindings/clock/qcom,gcc-msm8974.h> 8 #include <dt-bindings/clock/qcom,mmcc-msm8974.h> 9 #include <dt-bindings/clock/qcom,rpmcc.h> 10 #include <dt-bindings/reset/qcom,gcc-msm8974.h> 11 #include <dt-bindings/gpio/gpio.h> [all …]
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| /linux/drivers/clk/qcom/ |
| H A D | clk-smd-rpm.c | 1 // SPDX-License-Identifier: GPL-2.0-only 8 #include <linux/clk-provider.h> 17 #include <linux/soc/qcom/smd-rpm.h> 19 #include <dt-bindings/clock/qcom,rpmcc.h> 179 * Interconnect clocks are managed by the icc framework, this driver 181 * clk_smd_rpm_enable_scaling() and interconnect driver initialization. 194 .key = cpu_to_le32(r->rpm_key), in clk_smd_rpm_handoff() 196 .value = cpu_to_le32(r->branch ? 1 : INT_MAX), in clk_smd_rpm_handoff() 200 r->rpm_res_type, r->rpm_clk_id, &req, in clk_smd_rpm_handoff() 205 r->rpm_res_type, r->rpm_clk_id, &req, in clk_smd_rpm_handoff() [all …]
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| /linux/drivers/net/wireless/ath/ath10k/ |
| H A D | ce.c | 1 // SPDX-License-Identifier: ISC 3 * Copyright (c) 2005-2011 Atheros Communications Inc. 4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 17 * communication between Host and Target over a PCIe interconnect. 26 * an address, length, and meta-data. 28 * Typically, one side of the PCIe/AHB/SNOC interconnect (Host or Target) 41 * There are several "contexts" managed by this layer -- more, it 42 * may seem -- than should be needed. These are provided mainly for 44 * implementation. There are per-CopyEngine recv, send, and watermark 48 * also a per-transfer context supplied by the caller when a buffer [all …]
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