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Searched +full:integrator +full:- +full:ap +full:- +full:pci (Results 1 – 8 of 8) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Darm,integrator.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,integrator
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/freebsd/sys/contrib/device-tree/src/arm/arm/
H A Dintegratorap.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree for the ARM Integrator/AP platform
6 /dts-v1/;
7 #include "integrator.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
12 model = "ARM Integrator/AP";
13 compatible = "arm,integrator-ap";
16 #address-cells = <1>;
17 #size-cells = <0>;
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/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dv3-v360epc-pci.txt1 V3 Semiconductor V360 EPC PCI bridge
3 This bridge is found in the ARM Integrator/AP (Application Platform)
6 - compatible: should be one of:
7 "v3,v360epc-pci"
8 "arm,integrator-ap-pci", "v3,v360epc-pci"
9 - reg: should contain two register areas:
12 - interrupts: should contain a reference to the V3 error interrupt
14 - bus-range: see pci.txt
15 - ranges: this follows the standard PCI bindings in the IEEE Std
16 1275-1994 (see pci.txt) with the following restriction:
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H A Dv3,v360epc-pci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pci/v3,v360epc-pci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: V3 Semiconductor V360 EPC PCI bridge
10 - Linus Walleij <linus.walleij@linaro.org>
13 This bridge is found in the ARM Integrator/AP (Application Platform)
16 - $ref: /schemas/pci/pci-host-bridge.yaml#
21 - const: arm,integrator-ap-pci
22 - const: v3,v360epc-pci
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/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Darm,syscon-icst.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/arm,syscon-icst.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linusw@kernel.org>
25 connects the low 8 bits of the VDW (missing one bit), hard-wires RDW to
26 different values and sometimes also hard-wires the output divider. They
37 Integrator/AP 22 1 Bit 8 0, rest variable
38 integratorap-cm
40 Integrator/AP 46 3 Bit 8 0, rest variable
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/freebsd/share/misc/
H A Dpci_vendors2 # List of PCI ID's
5 # Date: 2025-10-18 03:15:01
8 # the PCI ID Project at https://pci-ids.ucw.cz/.
14 # (version 2 or higher) or the 3-clause BSD License.
25 # device device_name <-- single tab
26 # subvendor subdevice subsystem_name <-- two tabs
30 # This is a relabelled RTL-8139
31 8139 AT-2500TX V3 Ethernet
41 7a09 PCI-to-PCI Bridge
51 7a19 PCI-to-PCI Bridge
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H A Dusb_vendors6 # http://www.linux-usb.org/usb-ids.html
7 # or send entries as patches (diff -u old new) in the
10 # http://www.linux-usb.org/usb.ids
13 # Date: 2025-09-15 20:34:02
20 # device device_name <-- single tab
21 # interface interface_name <-- two tabs
38 5301 GW-US54ZGL 802.11bg
54 145f NW-3100 802.11b/g 54Mbps Wireless Network Adapter [zd1211]
64 0200 TP-Link
86 120e ASI120MC-S Planetary Camera
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/freebsd/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h2 * Copyright (c) 2017-2018 Cavium, Inc.
78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
80 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
88 …xffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of…
90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
93 … (0xffff<<0) // This register identifies the PCI adapter. This value…
104 … (0x1<<3) // Special cycle enable. Not applicable for PCI Express. Must be ha…
106 … (0x1<<4) // Memory write and invalidate. Not applicable for PCI Express. Must be ha…
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