Searched full:input_reg (Results 1 – 25 of 38) sorted by relevance
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| /linux/drivers/pinctrl/freescale/ |
| H A D | pinctrl-imx.c | 216 * The input_reg[i] here is actually some IOMUXC general in imx_pmx_set_one_pin_mmio()
219 val = readl(ipctl->base + pin_mmio->input_reg); in imx_pmx_set_one_pin_mmio()
222 writel(val, ipctl->base + pin_mmio->input_reg); in imx_pmx_set_one_pin_mmio()
223 } else if (pin_mmio->input_reg) { in imx_pmx_set_one_pin_mmio()
230 pin_mmio->input_reg); in imx_pmx_set_one_pin_mmio()
233 pin_mmio->input_reg); in imx_pmx_set_one_pin_mmio()
236 pin_mmio->input_reg, pin_mmio->input_val); in imx_pmx_set_one_pin_mmio()
449 * <mux_reg conf_reg input_reg mux_mode input_val>
451 * <mux_conf_reg input_reg mux_mode input_val>
489 pin_mmio->input_reg = be32_to_cpu(*list++); in imx_pinctrl_parse_pin_mmio()
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| H A D | pinctrl-imx-scmi.c | 68 int mux_reg, conf_reg, input_reg, mux_val, conf_val, input_val; in pinctrl_scmi_imx_dt_node_to_map() local
115 input_reg = be32_to_cpu(*list++); in pinctrl_scmi_imx_dt_node_to_map()
138 if (!input_reg) { in pinctrl_scmi_imx_dt_node_to_map()
142 (input_reg - daisy_off) / 4); in pinctrl_scmi_imx_dt_node_to_map()
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| H A D | pinctrl-imx.h | 24 * @input_reg: the select input register offset for this pin if any
31 u16 input_reg; member
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| /linux/Documentation/devicetree/bindings/firmware/ |
| H A D | nxp,imx95-scmi-pinctrl.yaml | 29 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
42 "input_reg" indicates the offset of select input register.
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| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | fsl,imx8ulp-pinctrl.yaml | 35 setting for one pin. The first 4 integers <mux_config_reg input_reg
46 "input_reg" indicates the offset of select input register.
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| H A D | fsl,imxrt1050.yaml | 36 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
49 "input_reg" indicates the offset of select input register.
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| H A D | fsl,imxrt1170.yaml | 36 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
49 "input_reg" indicates the offset of select input register.
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| H A D | fsl,imx8m-pinctrl.yaml | 39 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
53 "input_reg" indicates the offset of select input register.
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| H A D | fsl,imx7ulp-iomuxc1.yaml | 41 <mux_conf_reg input_reg mux_mode input_val> are specified
55 "input_reg" indicates the offset of select input register.
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| H A D | fsl,imx7d-pinctrl.yaml | 44 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
57 "input_reg" indicates the offset of select input register.
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| H A D | fsl,imx35-pinctrl.yaml | 52 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
65 "input_reg" indicates the offset of select input register.
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| H A D | fsl,imx-pinctrl.txt | 26 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
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| /linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx6ull-pinfunc-snvs.h | 11 * <mux_reg conf_reg input_reg mux_mode input_val>
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| H A D | imx6ull-pinfunc.h | 12 * <mux_reg conf_reg input_reg mux_mode input_val>
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| H A D | imx7ulp-pinfunc.h | 12 * <mux_conf_reg input_reg mux_mode input_val>
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| H A D | imx25-pinfunc.h | 13 * <mux_reg conf_reg input_reg mux_mode input_val>
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| H A D | imx51-pinfunc.h | 11 * <mux_reg conf_reg input_reg mux_mode input_val>
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| H A D | imx6ul-pinfunc.h | 11 * <mux_reg conf_reg input_reg mux_mode input_val>
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8mq-pinfunc.h | 12 * <mux_reg conf_reg input_reg mux_mode input_val>
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| H A D | imx93-pinfunc.h | 11 * <mux_reg conf_reg input_reg mux_mode input_val>
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| H A D | imx8mn-pinfunc.h | 11 * <mux_reg conf_reg input_reg mux_mode input_val>
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| H A D | imx8mm-pinfunc.h | 11 * <mux_reg conf_reg input_reg mux_mode input_val>
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| H A D | imx95-pinfunc.h | 11 * <mux_reg conf_reg input_reg mux_mode input_val>
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| H A D | imx8ulp-pinfunc.h | 11 * <mux_reg input_reg mux_mode input_val>
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| /linux/arch/arm/boot/dts/nxp/vf/ |
| H A D | vf610-pinfunc.h | 11 * <mux_reg input_reg mux_mode input_val>
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