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/freebsd/sys/contrib/device-tree/Bindings/crypto/
H A Dqcom,inline-crypto-engine.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/crypto/qcom,inline-crypto-engine.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. (QTI) Inline Crypto Engine
10 - Bjorn Andersson <andersson@kernel.org>
15 - enum:
16 - qcom,sa8775p-inline-crypto-engine
17 - qcom,sc7180-inline-crypto-engine
18 - qcom,sc7280-inline-crypto-engine
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/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dsdhci-msm.txt1 * Qualcomm SDHCI controller (sdhci-msm)
4 and the properties used by the sdhci-msm driver.
7 - compatible: Should contain a SoC-specific string and a IP version string:
9 "qcom,sdhci-msm-v4" for sdcc versions less than 5.0
10 "qcom,sdhci-msm-v5" for sdcc version 5.0
13 string is added to support this change - "qcom,sdhci-msm-v5".
15 "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4"
16 "qcom,msm8226-sdhci", "qcom,sdhci-msm-v4"
17 "qcom,msm8953-sdhci", "qcom,sdhci-msm-v4"
18 "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4"
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H A Dsdhci-msm.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/sdhci-msm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SDHCI controller (sdhci-msm)
10 - Bhupesh Sharma <bhupesh.sharma@linaro.org>
19 - enum:
20 - qcom,sdhci-msm-v4
22 - items:
23 - enum:
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/freebsd/sys/contrib/dev/athk/ath10k/
H A Dcore.h1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
49 #define ATH10K_DEFAULT_NOISE_FLOOR -95
70 /* SMBIOS type structure length (excluding strings-set) */
96 static inline const char *ath10k_bus_str(enum ath10k_bus bus) in ath10k_bus_str()
141 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb) in ATH10K_SKB_CB()
145 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; in ATH10K_SKB_CB()
148 static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb) in ATH10K_SKB_RXCB()
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/freebsd/sys/contrib/openzfs/include/sys/
H A Dqat.h9 * or https://opensource.org/licenses/CDDL-1.0.
38 #include <sys/crypto/api.h>
56 * Number of jobs submitted to QAT compression engine.
60 * Total bytes sent to QAT compression engine.
64 * Total bytes output from QAT compression engine.
68 * Number of jobs submitted to QAT de-compression engine.
72 * Total bytes sent to QAT de-compression engine.
76 * Total bytes output from QAT de-compression engine.
80 * Number of fails in the QAT compression / decompression engine.
90 * Number of jobs submitted to QAT encryption engine.
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/freebsd/sys/dev/safexcel/
H A Dsafexcel_var.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
58 /* Processing Engine Control Data format. */
73 /* Inline instructions or IV. */
80 * The Processing Engine and driver cooperate to maintain a set of command
81 * rings, representing outstanding crypto operation requests. Each descriptor
82 * corresponds to an input data segment, and thus a single crypto(9) request may
163 #define SAFEXCEL_OPTION_CP (1u << 1) /* 64-bit ctx addr */
225 * The EIP-96 (crypto transform engine) is programmed using a set of
263 /* Instruction-dependent flags. */
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H A Dsafexcel.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
48 #include <crypto/rijndael/rijndael.h>
64 { "inside-secure,safexcel-eip97ies", (uintptr_t)97 },
65 { "inside-secure,safexcel-eip97", (uintptr_t)97 },
100 i = ring->cdr.read; in safexcel_next_request()
103 return (&ring->requests[i]); in safexcel_next_request()
111 if (ring->write == ring->read) in safexcel_cmd_descr_next()
113 cdesc = &ring->desc[ring->read]; in safexcel_cmd_descr_next()
114 ring->read = (ring->read + 1) % SAFEXCEL_RING_SIZE; in safexcel_cmd_descr_next()
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/freebsd/crypto/openssl/engines/
H A De_padlock.c2 * Copyright 2004-2023 The OpenSSL Project Authors. All Rights Reserved.
11 * This file uses the low level AES and engine functions (which are deprecated
12 * for non-internal use) in order to implement the padlock engine AES ciphers.
20 #include <openssl/crypto.h>
21 #include <openssl/engine.h>
39 static ENGINE *ENGINE_padlock(void);
47 /* On non-x86 CPUs it just returns. */ in engine_load_padlock_int()
49 ENGINE *toadd = ENGINE_padlock(); in engine_load_padlock_int()
56 * release our just-created reference. in engine_load_padlock_int()
72 /* Function for ENGINE detection and control */
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/freebsd/sys/dev/qat/qat_api/common/crypto/sym/include/
H A Dlac_session.h1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
27 * \ref cpaCySymSessionCtxGetSize(). Internally this memory is re-aligned on a
28 * 64 byte boundary for use by the QAT engine. The aligned pointer is saved in
33 * <b>LAC Session Init</b>\n The session descriptor is re-aligned and
35 * the hardware setup for the QAT engine. The content descriptor is a read
59 * - The perform funcion increments the reference count for the session.
60 * - The callback function decrements the reference count for the session.
61 * - The Remove function checks the reference count to ensure that it is 0.
64 * - \ref LacMem "Memory" - Inline memory functions
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/freebsd/crypto/openssl/
H A DCHANGES.md4 This is a high-level summary of the most important changes.
11 ----------------
13 - [OpenSSL 3.0](#openssl-30)
14 - [OpenSSL 1.1.1](#openssl-111)
15 - [OpenSSL 1.1.0](#openssl-110)
16 - [OpenSSL 1.0.2](#openssl-102)
17 - [OpenSSL 1.0.1](#openssl-101)
18 - [OpenSSL 1.0.0](#openssl-100)
19 - [OpenSSL 0.9.x](#openssl-09x)
22 -----------
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H A DConfigure2 # -*- mode: perl; -*-
3 # Copyright 2016-2024 The OpenSSL Project Authors. All Rights Reserved.
10 ## Configure -- OpenSSL source tree configuration script
30 …-<cipher> ...] [enable-<cipher> ...] [-Dxxx] [-lxxx] [-Lxxx] [-fxxx] [-Kxxx] [no-hw-xxx|no-hw] [[n…
42 *** perl configdata.pm --dump ***
52 # --config add the given configuration file, which will be read after
55 # --prefix prefix for the OpenSSL installation, which includes the
59 # --openssldir OpenSSL data area, such as openssl.cnf, certificates and keys.
61 # given with --prefix.
64 # --banner=".." Output specified text instead of default completion banner
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/freebsd/sys/contrib/dev/athk/ath12k/
H A Dcore.h1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
81 /* Only use hardware crypto engine */
83 /* Only use software crypto */
87 static inline enum wme_ac ath12k_tid_to_ac(u32 tid) in ath12k_tid_to_ac()
405 /* the following are protected by ar->data_lock */
439 #define ATH12K_DEFAULT_NOISE_FLOOR -95
534 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */
749 /* Below regd's are protected by ab->data_lock */
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/freebsd/sys/contrib/alpine-hal/eth/
H A Dal_hal_eth_ec_regs.h1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
103 /* [0x0] Ethernet parsing engine configuration 1 */
214 /* [0x38] VLAN p-bits table address */
216 /* [0x3c] VLAN p-bits table data */
250 /* [0x7c] LRO offload engine configuration register */
252 /* [0x80] LRO offload engine Check rules configurations for I ... */
254 /* [0x84] LRO offload engine IPv4 values configuration */
256 /* [0x88] LRO offload engine Check rules configurations for I ... */
258 /* [0x8c] LRO offload engine IPv6 values configuration */
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/freebsd/sys/dev/cxgbe/crypto/
H A Dt4_crypto.c1 /*-
46 #include "crypto/t4_crypto.h"
51 * +--------
[all...]
H A Dt4_keyctx.c1 /*-
2 * Copyright (c) 2017-2019 Chelsio Communications, Inc.
38 #include "crypto/t4_crypto.h"
41 * Crypto operations use a key context to store cipher keys and
42 * partial hash digests. They can either be passed inline as part of
43 * a work request using crypto or they can be stored in card RAM. For
44 * the latter case, work requests must replace the inline key context
49 * +-------------------------------+
51 * +-------------------------------+
52 * | AES key | ----- For requests with AES
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/freebsd/sys/dev/qat/qat_hw/qat_c4xxx/
H A Dadf_c4xxx_hw_data.c1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
48 /* Accel engine threads for each of the following services
132 device_t pdev = accel_dev->accel_pci_dev.pci_dev; in get_accel_mask()
146 device_t pdev = accel_dev->accel_pci_dev.pci_dev; in get_ae_mask()
163 return self ? hweight32(self->accel_mask) : 0; in get_num_accels()
169 return self ? hweight32(self->ae_mask) : 0; in get_num_aes()
190 static inline void
198 * c4xxx_set_ssm_wdtimer() - Initialize the slice hang watchdog timer.
206 struct adf_hw_device_data *hw_device = accel_dev->hw_device; in c4xxx_set_ssm_wdtimer()
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/freebsd/sys/contrib/device-tree/Bindings/ufs/
H A Dqcom,ufs.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
11 - Andy Gross <agross@kernel.org>
13 # Select only our matches, not all jedec,ufs-2.0
20 - compatible
25 - enum:
26 - qcom,msm8994-ufshc
27 - qcom,msm8996-ufshc
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/freebsd/sys/dev/qat_c2xxx/
H A Dqatvar.h1 /* SPDX-License-Identifier: BSD-2-Clause AND BSD-3-Clause */
31 * Copyright(c) 2007-2019 Intel Corporation. All rights reserved.
146 #define QAT_SIZE_TO_RING_SIZE_IN_BYTES(SIZE) ((1 << (SIZE - 1)) << 7)
147 #define QAT_RING_SIZE_IN_BYTES_TO_SIZE(SIZE) ((1 << (SIZE - 1)) >> 7)
158 ((((1 << (RING_SIZE - 1)) << 3) >> QAT_SIZE_TO_POW(MSG_SIZE)) - 1)
234 ((sc)->sc_ae[ae])
238 u_int qae_ustore_size; /* free micro-store address */
239 u_int qae_free_addr; /* free micro-store address */
240 u_int qae_free_size; /* free micro-store size */
242 u_int qae_ustore_dram_addr; /* micro-store DRAM address */
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/freebsd/contrib/bearssl/src/
H A Dinner.h46 * 2048-bit RSA keys offer adequate security, and should still do so for
48 * already set their root keys to RSA-4096, so we should be able to
68 * Maximum size for a RSA factor (in bits). This is for RSA private-key
87 * 64-bit types so that we may automatically use implementations that
88 * use 64-bit registers in that case. Future versions may detect, e.g.,
91 * If 'unsigned long' is a 64-bit type, then we assume that 64-bit types
94 * as 64-bit means that the 32-bit code will be used, and that code
95 * works also on 64-bit architectures (the 64-bit code may simply be
100 * 32-bit for compatibility with all the legacy code that liberally uses
101 * the 'DWORD' type for 32-bit values.
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/freebsd/sys/contrib/dev/athk/ath11k/
H A Dcore.h1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
51 /* SMBIOS type structure length (excluding strings-set) */
113 /* Only use hardware crypto engine */
115 /* Only use software crypto */
119 static inline enum wme_ac ath11k_tid_to_ac(u32 tid) in ath11k_tid_to_ac()
201 /* set country code by ANSI country name, based on ISO3166-1 alpha2 */
505 /* the following are protected by ar->data_lock */
534 /* Protected with ar->data_lock */
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/freebsd/sys/dev/sec/
H A Dsec.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (C) 2008-2009 Semihalf, Piotr Ziecik
29 * Freescale integrated Security Engine (SEC) driver. Currently SEC 2.0 and
125 /* Crypto methods */
139 MODULE_DEPEND(sec, crypto, 1, 1, 1);
153 static inline void
158 if (dma_mem->dma_vaddr != NULL) in sec_sync_dma_mem()
159 bus_dmamap_sync(dma_mem->dma_tag, dma_mem->dma_map, op); in sec_sync_dma_mem()
162 static inline void *
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/freebsd/contrib/ldns/
H A Dconfigure.ac1 # -*- Autoconf -*-
18 # ---------------
20 # (binary-api-number):(which-binary-api-version):(how-many-nrs-backwardscompat)
28 # ldns-1.6.17 and before had a .so with version same as VERSION_INFO
29 # ldns-1.7.0 had libversion 2:0:0
30 # ldns-1.7.1 had libversion 3:0:0 (though it should have had 3:0:1)
31 # ldns-1.8.0 had libversion 4:0:2 (though it should have had 4:0:1)
32 # ldns-1.8.1 had libversion 5:0:2
33 # ldns-1.8.1 had libversion 6:0:3
34 # ldns-1.8.2 had libversion 7:0:4
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/freebsd/sys/dev/safe/
H A Dsafe.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
32 * SafeNet SafeXcel-1141 hardware crypto accelerator
102 /* crypto device methods */
117 MODULE_DEPEND(safe, crypto, 1, 1, 1);
133 bus_dmamap_sync((_dma)->dma_tag, (_dma)->dma_map, (_flags))
167 bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (r))
170 bus_space_write_4((sc)->sc_st, (sc)->sc_sh, reg, val)
181 0, "RNG polling buffer size (32-bit words)");
200 switch (pci_get_vendor(sc->sc_dev)) { in safe_partname()
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/freebsd/crypto/heimdal/
H A DChangeLog.20051 2005-12-15 Love Hörnquist Åstrand <lha@it.su.se>
6 * fix-export: Build kdc-private.h.
8 2005-12-14 Love Hörnquist Åstrand <lha@it.su.se>
13 2005-12-13 Love Hörnquist Åstrand <lha@it.su.se>
38 2005-12-12 Love Hörnquist Åstrand <lha@it.su.se>
50 * lib/hdb/hdb-ldap.c: Wrap hdb_entry with hdb_entry_ex, add url
57 <kdc-private.h>.
59 * kdc/Makefile.am: Build kdc-private.h and depend on it.
73 2005-12-11 Love Hörnquist Åstrand <lha@it.su.se>
81 2005-12-08 Love Hörnquist Åstrand <lha@it.su.se>
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsm8550.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
8 #include <dt-bindings/clock/qcom,sm8550-camcc.h>
9 #include <dt-bindings/clock/qcom,sm8550-gcc.h>
10 #include <dt-bindings/clock/qcom,sm8550-gpucc.h>
11 #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
12 #include <dt-bindings/clock/qcom,sm8550-dispcc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
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