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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
H A Dinit.c31 #include <subdev/bios/init.h>
42 nvkm_printk(init->subdev, lvl, info, "0x%08x[%c]: "fmt, \
43 init->offset, init_exec(init) ? \
44 '0' + (init->nested - 1) : ' ', ##args); \
47 if (init->subdev->debug >= NV_DBG_TRACE) \
55 * init parser control flow helpers
59 init_exec(struct nvbios_init *init) in init_exec() argument
61 return (init->execute == 1) || ((init->execute & 5) == 5); in init_exec()
65 init_exec_set(struct nvbios_init *init, bool exec) in init_exec_set() argument
67 if (exec) init->execute &= 0xfd; in init_exec_set()
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/
H A Dbase.c30 nvkm_devinit_mmio(struct nvkm_devinit *init, u32 addr) in nvkm_devinit_mmio() argument
32 if (init->func->mmio) in nvkm_devinit_mmio()
33 addr = init->func->mmio(init, addr); in nvkm_devinit_mmio()
38 nvkm_devinit_pll_set(struct nvkm_devinit *init, u32 type, u32 khz) in nvkm_devinit_pll_set() argument
40 return init->func->pll_set(init, type, khz); in nvkm_devinit_pll_set()
44 nvkm_devinit_meminit(struct nvkm_devinit *init) in nvkm_devinit_meminit() argument
46 if (init->func->meminit) in nvkm_devinit_meminit()
47 init->func->meminit(init); in nvkm_devinit_meminit()
51 nvkm_devinit_disable(struct nvkm_devinit *init) in nvkm_devinit_disable() argument
53 if (init && init->func->disable) in nvkm_devinit_disable()
[all …]
H A Dgm200.c33 pmu_code(struct nv50_devinit *init, u32 pmu, u32 img, u32 len, bool sec) in pmu_code() argument
35 struct nvkm_device *device = init->base.subdev.device; in pmu_code()
53 pmu_data(struct nv50_devinit *init, u32 pmu, u32 img, u32 len) in pmu_data() argument
55 struct nvkm_device *device = init->base.subdev.device; in pmu_data()
65 pmu_args(struct nv50_devinit *init, u32 argp, u32 argi) in pmu_args() argument
67 struct nvkm_device *device = init->base.subdev.device; in pmu_args()
74 pmu_exec(struct nv50_devinit *init, u32 init_addr) in pmu_exec() argument
76 struct nvkm_device *device = init->base.subdev.device; in pmu_exec()
83 pmu_load(struct nv50_devinit *init, u8 type, bool post, in pmu_load() argument
86 struct nvkm_subdev *subdev = &init->base.subdev; in pmu_load()
[all …]
/linux/drivers/clk/stm32/
H A Dclk-stm32mp25.c484 .hw.init = CLK_HW_INIT_INDEX("ck_icn_p_adc12", ICN_LS_MCU, &clk_stm32_gate_ops, 0),
491 .hw.init = CLK_HW_INIT_PARENTS_DATA("ck_ker_adc12", adc12_src, &clk_stm32_composite_ops, 0),
496 .hw.init = CLK_HW_INIT_INDEX("ck_icn_p_adc3", ICN_LS_MCU, &clk_stm32_gate_ops, 0),
503 .hw.init = CLK_HW_INIT_PARENTS_DATA("ck_ker_adc3", adc3_src, &clk_stm32_composite_ops, 0),
509 .hw.init = CLK_HW_INIT_INDEX("ck_icn_p_adf1", ICN_LS_MCU, &clk_stm32_gate_ops, 0),
514 .hw.init = CLK_HW_INIT_INDEX("ck_ker_adf1", FLEXGEN_42, &clk_stm32_gate_ops, 0),
520 .hw.init = CLK_HW_INIT_INDEX("ck_icn_p_cci", ICN_LS_MCU, &clk_stm32_gate_ops, 0),
526 .hw.init = CLK_HW_INIT_INDEX("ck_icn_p_csi", ICN_APB4, &clk_stm32_gate_ops, 0),
531 .hw.init = CLK_HW_INIT_INDEX("ck_ker_csi", FLEXGEN_29, &clk_stm32_gate_ops, 0),
536 .hw.init = CLK_HW_INIT_INDEX("ck_ker_csitxesc", FLEXGEN_30, &clk_stm32_gate_ops, 0),
[all …]
H A Dclk-stm32mp13.c648 .hw.init = CLK_HW_INIT("tim2_k", "timg1_ck", &clk_stm32_gate_ops, CLK_SET_RATE_PARENT),
653 .hw.init = CLK_HW_INIT("tim3_k", "timg1_ck", &clk_stm32_gate_ops, CLK_SET_RATE_PARENT),
658 .hw.init = CLK_HW_INIT("tim4_k", "timg1_ck", &clk_stm32_gate_ops, CLK_SET_RATE_PARENT),
663 .hw.init = CLK_HW_INIT("tim5_k", "timg1_ck", &clk_stm32_gate_ops, CLK_SET_RATE_PARENT),
668 .hw.init = CLK_HW_INIT("tim6_k", "timg1_ck", &clk_stm32_gate_ops, CLK_SET_RATE_PARENT),
673 .hw.init = CLK_HW_INIT("tim7_k", "timg1_ck", &clk_stm32_gate_ops, CLK_SET_RATE_PARENT),
678 .hw.init = CLK_HW_INIT("tim1_k", "timg2_ck", &clk_stm32_gate_ops, CLK_SET_RATE_PARENT),
683 .hw.init = CLK_HW_INIT("tim8_k", "timg2_ck", &clk_stm32_gate_ops, CLK_SET_RATE_PARENT),
688 .hw.init = CLK_HW_INIT("tim12_k", "timg3_ck", &clk_stm32_gate_ops, CLK_SET_RATE_PARENT),
693 .hw.init = CLK_HW_INIT("tim13_k", "timg3_ck", &clk_stm32_gate_ops, CLK_SET_RATE_PARENT),
[all …]
/linux/drivers/clk/socfpga/
H A Dclk-periph-s10.c106 struct clk_init_data init; in s10_register_periph() local
117 init.name = name; in s10_register_periph()
118 init.ops = &peri_c_clk_ops; in s10_register_periph()
119 init.flags = clks->flags; in s10_register_periph()
121 init.num_parents = clks->num_parents; in s10_register_periph()
122 init.parent_names = parent_name ? &parent_name : NULL; in s10_register_periph()
123 if (init.parent_names == NULL) in s10_register_periph()
124 init.parent_data = clks->parent_data; in s10_register_periph()
126 periph_clk->hw.hw.init = &init; in s10_register_periph()
142 struct clk_init_data init; in n5x_register_periph() local
[all …]
H A Dclk-pll-s10.c195 struct clk_init_data init; in s10_register_pll() local
206 init.ops = &clk_boot_ops; in s10_register_pll()
208 init.ops = &clk_pll_ops; in s10_register_pll()
210 init.name = name; in s10_register_pll()
211 init.flags = clks->flags; in s10_register_pll()
213 init.num_parents = clks->num_parents; in s10_register_pll()
214 init.parent_names = NULL; in s10_register_pll()
215 init.parent_data = clks->parent_data; in s10_register_pll()
216 pll_clk->hw.hw.init = &init; in s10_register_pll()
235 struct clk_init_data init; in agilex_register_pll() local
[all …]
H A Dclk-gate-s10.c131 struct clk_init_data init; in s10_register_gate() local
162 init.ops = &dbgclk_ops; in s10_register_gate()
164 init.ops = &gateclk_ops; in s10_register_gate()
166 init.name = clks->name; in s10_register_gate()
167 init.flags = clks->flags; in s10_register_gate()
169 init.num_parents = clks->num_parents; in s10_register_gate()
170 init.parent_names = parent_name ? &parent_name : NULL; in s10_register_gate()
171 if (init.parent_names == NULL) in s10_register_gate()
172 init.parent_data = clks->parent_data; in s10_register_gate()
173 socfpga_clk->hw.hw.init = &init; in s10_register_gate()
[all …]
/linux/arch/um/drivers/
H A Dumcast_kern.c14 #include <linux/init.h>
31 struct umcast_init *init = data; in umcast_init() local
35 dpri->addr = init->addr; in umcast_init()
36 dpri->lport = init->lport; in umcast_init()
37 dpri->rport = init->rport; in umcast_init()
38 dpri->unicast = init->unicast; in umcast_init()
39 dpri->ttl = init->ttl; in umcast_init()
64 .init = umcast_init,
72 struct umcast_init *init = data; in mcast_setup() local
76 *init = ((struct umcast_init) in mcast_setup()
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/therm/
H A Dgf100.c28 #define pack_for_each_init(init, pack, head) \ argument
29 for (pack = head; pack && pack->init; pack++) \
30 for (init = pack->init; init && init->count; init++)
37 const struct nvkm_therm_clkgate_init *init; in gf100_clkgate_init() local
40 pack_for_each_init(init, pack, p) { in gf100_clkgate_init()
41 next = init->addr + init->count * 8; in gf100_clkgate_init()
42 addr = init->addr; in gf100_clkgate_init()
45 init->addr, init->count, init->data); in gf100_clkgate_init()
48 addr, init->data); in gf100_clkgate_init()
49 nvkm_wr32(device, addr, init->data); in gf100_clkgate_init()
/linux/drivers/clk/qcom/
H A Dgcc-sc8280xp.c118 .hw.init = &(const struct clk_init_data) {
139 .clkr.hw.init = &(const struct clk_init_data) {
155 .hw.init = &(const struct clk_init_data) {
170 .hw.init = &(const struct clk_init_data) {
185 .hw.init = &(const struct clk_init_data) {
200 .hw.init = &(const struct clk_init_data) {
215 .hw.init = &(const struct clk_init_data) {
453 .hw.init = &(const struct clk_init_data) {
468 .hw.init = &(const struct clk_init_data) {
557 .hw.init = &(const struct clk_init_data) {
[all …]
H A Dgcc-msm8996.c38 .hw.init = &(struct clk_init_data){
54 .hw.init = &(struct clk_init_data){
68 .hw.init = &(struct clk_init_data){
81 .clkr.hw.init = &(struct clk_init_data){
96 .hw.init = &(struct clk_init_data){
113 .hw.init = &(struct clk_init_data){
131 .hw.init = &(struct clk_init_data){
145 .clkr.hw.init = &(struct clk_init_data){
260 .clkr.hw.init = &(struct clk_init_data){
278 .clkr.hw.init = &(struct clk_init_data){
[all …]
H A Dgcc-sm8250.c41 .hw.init = &(struct clk_init_data){
64 .clkr.hw.init = &(struct clk_init_data){
80 .hw.init = &(struct clk_init_data){
97 .hw.init = &(struct clk_init_data){
199 .clkr.hw.init = &(struct clk_init_data){
223 .clkr.hw.init = &(struct clk_init_data){
237 .clkr.hw.init = &(struct clk_init_data){
251 .clkr.hw.init = &(struct clk_init_data){
271 .clkr.hw.init = &(struct clk_init_data){
285 .clkr.hw.init = &(struct clk_init_data){
[all …]
H A Dgcc-msm8917.c60 .hw.init = &(struct clk_init_data){
77 .hw.init = &(struct clk_init_data) {
91 .clkr.hw.init = &(struct clk_init_data){
120 .hw.init = &(struct clk_init_data){
134 .clkr.hw.init = &(struct clk_init_data){
151 .hw.init = &(struct clk_init_data){
165 .clkr.hw.init = &(struct clk_init_data){
183 .clkr.hw.init = &(struct clk_init_data){
196 .hw.init = &(struct clk_init_data){
262 .clkr.hw.init = &(struct clk_init_data) {
[all …]
H A Decpricc-qdu1000.c68 .hw.init = &(const struct clk_init_data) {
98 .hw.init = &(const struct clk_init_data) {
178 .clkr.hw.init = &(const struct clk_init_data) {
198 .clkr.hw.init = &(const struct clk_init_data) {
218 .clkr.hw.init = &(const struct clk_init_data) {
237 .clkr.hw.init = &(const struct clk_init_data) {
258 .clkr.hw.init = &(const struct clk_init_data) {
278 .clkr.hw.init = &(const struct clk_init_data) {
292 .clkr.hw.init = &(const struct clk_init_data) {
306 .clkr.hw.init = &(const struct clk_init_data) {
[all …]
H A Dgcc-msm8998.c43 .hw.init = &(struct clk_init_data){
57 .clkr.hw.init = &(struct clk_init_data){
70 .clkr.hw.init = &(struct clk_init_data){
83 .clkr.hw.init = &(struct clk_init_data){
96 .clkr.hw.init = &(struct clk_init_data){
114 .hw.init = &(struct clk_init_data){
128 .clkr.hw.init = &(struct clk_init_data){
141 .clkr.hw.init = &(struct clk_init_data){
154 .clkr.hw.init = &(struct clk_init_data){
167 .clkr.hw.init = &(struct clk_init_data){
[all …]
H A Dgcc-sc8180x.c54 .hw.init = &(struct clk_init_data){
80 .clkr.hw.init = &(struct clk_init_data){
96 .hw.init = &(struct clk_init_data){
115 .hw.init = &(struct clk_init_data){
134 .hw.init = &(struct clk_init_data){
151 .hw.init = &(const struct clk_init_data) {
294 .clkr.hw.init = &(struct clk_init_data){
320 .clkr.hw.init = &(struct clk_init_data){
344 .clkr.hw.init = &(struct clk_init_data){
359 .clkr.hw.init = &(struct clk_init_data){
[all …]
H A Dgcc-msm8994.c7 #include <linux/init.h>
38 .hw.init = &(struct clk_init_data){
52 .clkr.hw.init = &(struct clk_init_data){
68 .hw.init = &(struct clk_init_data){
83 .clkr.hw.init = &(struct clk_init_data){
131 .clkr.hw.init = &(struct clk_init_data){
151 .clkr.hw.init = &(struct clk_init_data){
170 .clkr.hw.init = &(struct clk_init_data){
208 .clkr.hw.init = &(struct clk_init_data){
221 .clkr.hw.init = &(struct clk_init_data){
[all …]
H A Dgcc-sm8150.c41 .hw.init = &(struct clk_init_data){
68 .clkr.hw.init = &(struct clk_init_data){
84 .hw.init = &(struct clk_init_data){
102 .hw.init = &(struct clk_init_data){
224 .clkr.hw.init = &(struct clk_init_data){
250 .clkr.hw.init = &(struct clk_init_data){
274 .clkr.hw.init = &(struct clk_init_data){
289 .clkr.hw.init = &(struct clk_init_data){
304 .clkr.hw.init = &(struct clk_init_data){
325 .clkr.hw.init = &(struct clk_init_data){
[all …]
H A Dgcc-sa8775p.c79 .hw.init = &(const struct clk_init_data){
100 .clkr.hw.init = &(const struct clk_init_data){
116 .hw.init = &(const struct clk_init_data){
131 .hw.init = &(const struct clk_init_data){
146 .hw.init = &(const struct clk_init_data){
161 .hw.init = &(const struct clk_init_data){
176 .hw.init = &(const struct clk_init_data){
449 .hw.init = &(const struct clk_init_data){
461 .hw.init = &(const struct clk_init_data){
478 .hw.init = &(const struct clk_init_data){
[all …]
/linux/drivers/clk/ti/
H A Dapll.c136 const struct clk_init_data *init = clk_hw->hw.init; in omap_clk_register_apll() local
166 kfree(init->parent_names); in omap_clk_register_apll()
167 kfree(init); in omap_clk_register_apll()
173 kfree(init->parent_names); in omap_clk_register_apll()
174 kfree(init); in omap_clk_register_apll()
182 struct clk_init_data *init = NULL; in of_dra7_apll_setup() local
188 init = kzalloc(sizeof(*init), GFP_KERNEL); in of_dra7_apll_setup()
189 if (!ad || !clk_hw || !init) in of_dra7_apll_setup()
193 clk_hw->hw.init = init; in of_dra7_apll_setup()
195 init->name = ti_dt_clk_name(node); in of_dra7_apll_setup()
[all …]
/linux/drivers/clk/at91/
H A Dclk-main.c159 struct clk_init_data init = {}; in at91_clk_register_main_osc() local
170 init.name = name; in at91_clk_register_main_osc()
171 init.ops = &main_osc_ops; in at91_clk_register_main_osc()
173 init.parent_data = (const struct clk_parent_data *)parent_data; in at91_clk_register_main_osc()
175 init.parent_names = &parent_name; in at91_clk_register_main_osc()
176 init.num_parents = 1; in at91_clk_register_main_osc()
177 init.flags = CLK_IGNORE_UNUSED; in at91_clk_register_main_osc()
179 osc->hw.init = &init; in at91_clk_register_main_osc()
302 struct clk_init_data init; in at91_clk_register_main_rc_osc() local
313 init.name = name; in at91_clk_register_main_rc_osc()
[all …]
/linux/drivers/scsi/aacraid/
H A Dcomminit.c21 #include <linux/init.h>
62 union aac_init *init; in aac_alloc_comm() local
105 dev->init = (union aac_init *)(base + fibsize + host_rrq_size); in aac_alloc_comm()
108 init = dev->init; in aac_alloc_comm()
114 init->r8.init_struct_revision = in aac_alloc_comm()
116 init->r8.init_flags = cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED | in aac_alloc_comm()
119 init->r8.init_flags |= in aac_alloc_comm()
121 init->r8.rr_queue_count = cpu_to_le32(dev->max_msix); in aac_alloc_comm()
122 init->r8.max_io_size = in aac_alloc_comm()
124 init->r8.max_num_aif = init->r8.reserved1 = in aac_alloc_comm()
[all …]
/linux/lib/
H A Dstackinit_kunit.c4 * -ftrivial-auto-var-init={zero,pattern} or CONFIG_GCC_PLUGIN_STRUCTLEAK*.
15 #include <linux/init.h>
205 /* Fill clone type with zero for per-field init. */ \
383 #define DEFINE_SCALAR_TEST(name, init, xfail) \ argument
384 DEFINE_TEST(name ## _ ## init, name, SCALAR, \
385 init, xfail)
387 #define DEFINE_SCALAR_TESTS(init, xfail) \ argument
388 DEFINE_SCALAR_TEST(u8, init, xfail); \
389 DEFINE_SCALAR_TEST(u16, init, xfail); \
390 DEFINE_SCALAR_TEST(u32, init, xfail); \
[all …]
/linux/arch/arm/mach-omap1/
H A Dclock_data.c77 .hw.init = CLK_HW_INIT_NO_PARENT("ck_ref", &omap1_clk_rate_ops, 0),
82 .hw.init = CLK_HW_INIT("ck_dpll1", "ck_ref", &omap1_clk_rate_ops,
96 .hw.init = CLK_HW_INIT("ck_dpll1out", "ck_dpll1", &omap1_clk_gate_ops, 0),
106 .hw.init = CLK_HW_INIT("ck_sossi", "ck_dpll1out", &omap1_clk_full_ops, 0),
117 .hw.init = CLK_HW_INIT("arm_ck", "ck_dpll1", &omap1_clk_rate_ops, 0),
126 .hw.init = CLK_HW_INIT("armper_ck", "ck_dpll1", &omap1_clk_full_ops,
145 .hw.init = CLK_HW_INIT("ick", "ck_dpll1", &omap1_clk_gate_ops, CLK_IS_CRITICAL),
153 .hw.init = CLK_HW_INIT("armxor_ck", "ck_ref", &omap1_clk_gate_ops,
165 .hw.init = CLK_HW_INIT("armtim_ck", "ck_ref", &omap1_clk_gate_ops,
177 .hw.init = CLK_HW_INIT("armwdt_ck", "ck_ref", &omap1_clk_full_ops, 0),
[all …]

12345678910>>...253