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/linux/drivers/net/ethernet/mellanox/mlx4/
H A Dmlx4.h206 struct mlx4_cmd_mailbox *inbox);
208 struct mlx4_cmd_mailbox *inbox,
996 struct mlx4_cmd_mailbox *inbox,
1001 struct mlx4_cmd_mailbox *inbox,
1006 struct mlx4_cmd_mailbox *inbox,
1011 struct mlx4_cmd_mailbox *inbox,
1016 struct mlx4_cmd_mailbox *inbox,
1021 struct mlx4_cmd_mailbox *inbox,
1026 struct mlx4_cmd_mailbox *inbox,
1031 struct mlx4_cmd_mailbox *inbox,
[all …]
H A Dresource_tracker.c692 struct mlx4_cmd_mailbox *inbox) in update_pkey_index() argument
694 u8 sched = *(u8 *)(inbox->buf + 64); in update_pkey_index()
695 u8 orig_index = *(u8 *)(inbox->buf + 35); in update_pkey_index()
703 *(u8 *)(inbox->buf + 35) = new_index; in update_pkey_index()
706 static void update_gid(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *inbox, in update_gid() argument
709 struct mlx4_qp_context *qp_ctx = inbox->buf + 8; in update_gid()
710 enum mlx4_qp_optpar optpar = be32_to_cpu(*(__be32 *) inbox->buf); in update_gid()
750 struct mlx4_cmd_mailbox *inbox, in update_vport_qp_param() argument
753 struct mlx4_qp_context *qpc = inbox->buf + 8; in update_vport_qp_param()
779 *(__be32 *)inbox->buf = in update_vport_qp_param()
[all …]
H A Dfw.c181 u32 *inbox; in mlx4_MOD_STAT_CFG() local
192 inbox = mailbox->buf; in mlx4_MOD_STAT_CFG()
194 MLX4_PUT(inbox, cfg->log_pg_sz, MOD_STAT_CFG_PG_SZ_OFFSET); in mlx4_MOD_STAT_CFG()
195 MLX4_PUT(inbox, cfg->log_pg_sz_m, MOD_STAT_CFG_PG_SZ_M_OFFSET); in mlx4_MOD_STAT_CFG()
327 struct mlx4_cmd_mailbox *inbox, in mlx4_QUERY_FUNC_CAP_wrapper() argument
1274 struct mlx4_cmd_mailbox *inbox, in mlx4_QUERY_DEV_CAP_wrapper() argument
1408 struct mlx4_cmd_mailbox *inbox, in mlx4_QUERY_PORT_wrapper() argument
1745 struct mlx4_cmd_mailbox *inbox, in mlx4_QUERY_FW_wrapper() argument
1836 __be32 *inbox; in mlx4_INIT_HCA() local
1899 inbox = mailbox->buf; in mlx4_INIT_HCA()
[all …]
H A Dport.c1333 u8 op_mod, struct mlx4_cmd_mailbox *inbox) in mlx4_common_set_port() argument
1372 qpn_context = inbox->buf; in mlx4_common_set_port()
1388 gen_context = inbox->buf; in mlx4_common_set_port()
1411 gid_entry_mbox = (struct mlx4_roce_gid_entry *)(inbox->buf); in mlx4_common_set_port()
1440 gid_entry_mbox = (struct mlx4_roce_gid_entry *)(inbox->buf); in mlx4_common_set_port()
1457 gid_entry_mbox = (struct mlx4_roce_gid_entry *)(inbox->buf); in mlx4_common_set_port()
1463 gid_entry_mbox = (struct mlx4_roce_gid_entry *)(inbox->buf); in mlx4_common_set_port()
1469 err = mlx4_cmd(dev, inbox->dma, in_mod & 0xffff, op_mod, in mlx4_common_set_port()
1476 return mlx4_cmd(dev, inbox->dma, in_mod & 0xffff, op_mod, in mlx4_common_set_port()
1494 reset_qkey_viols = (*(u8 *) inbox->buf) & 0x40; in mlx4_common_set_port()
[all …]
H A Dcmd.c840 struct mlx4_cmd_mailbox *inbox, in query_pkey_block() argument
843 struct ib_smp *in_mad = (struct ib_smp *)(inbox->buf); in query_pkey_block()
853 err = mlx4_cmd_box(dev, inbox->dma, outbox->dma, port, 3, in query_pkey_block()
866 struct mlx4_cmd_mailbox *inbox, in get_full_pkey_table() argument
873 err = query_pkey_block(dev, port, i, table + i, inbox, outbox); in get_full_pkey_table()
893 struct mlx4_cmd_mailbox *inbox, in mlx4_MAD_IFC_wrapper() argument
897 struct ib_smp *smp = inbox->buf; in mlx4_MAD_IFC_wrapper()
935 err = get_full_pkey_table(dev, port, table, inbox, outbox); in mlx4_MAD_IFC_wrapper()
949 err = mlx4_cmd_box(dev, inbox->dma, outbox->dma, in mlx4_MAD_IFC_wrapper()
972 inbox->dma, in mlx4_MAD_IFC_wrapper()
[all …]
H A Dmr.c750 __be64 *inbox = NULL; in mlx4_write_mtt() local
762 inbox = mailbox->buf; in mlx4_write_mtt()
767 inbox[0] = cpu_to_be64(mtt->offset + start_index); in mlx4_write_mtt()
768 inbox[1] = 0; in mlx4_write_mtt()
770 inbox[i + 2] = cpu_to_be64(page_list[i] | in mlx4_write_mtt()
H A Dfw.h237 struct mlx4_cmd_mailbox *inbox,
/linux/drivers/infiniband/hw/mthca/
H A Dmthca_cmd.c1315 __be32 *inbox; in mthca_INIT_HCA() local
1359 inbox = mailbox->buf; in mthca_INIT_HCA()
1361 memset(inbox, 0, INIT_HCA_IN_SIZE); in mthca_INIT_HCA()
1364 MTHCA_PUT(inbox, 0x1, INIT_HCA_FLAGS1_OFFSET); in mthca_INIT_HCA()
1367 *(inbox + INIT_HCA_FLAGS2_OFFSET / 4) &= ~cpu_to_be32(1 << 1); in mthca_INIT_HCA()
1369 *(inbox + INIT_HCA_FLAGS2_OFFSET / 4) |= cpu_to_be32(1 << 1); in mthca_INIT_HCA()
1374 *(inbox + INIT_HCA_FLAGS2_OFFSET / 4) |= cpu_to_be32(1); in mthca_INIT_HCA()
1378 *(inbox + INIT_HCA_FLAGS2_OFFSET / 4) |= cpu_to_be32(7 << 3); in mthca_INIT_HCA()
1384 MTHCA_PUT(inbox, param->qpc_base, INIT_HCA_QPC_BASE_OFFSET); in mthca_INIT_HCA()
1385 MTHCA_PUT(inbox, param->log_num_qps, INIT_HCA_LOG_QP_OFFSET); in mthca_INIT_HCA()
[all …]
/linux/drivers/mailbox/
H A Dsprd-mailbox.c29 /* Bit and mask definition for inbox's SPRD_MBOX_FIFO_STS register */
44 /* Bit and mask definition for inbox's SPRD_MBOX_IRQ_MSK register */
161 /* Get the inbox data delivery status */ in sprd_mbox_inbox_isr()
165 dev_warn_ratelimited(priv->dev, "spurious inbox interrupt\n"); in sprd_mbox_inbox_isr()
201 /* Write data into inbox FIFO, and only support 8 bytes every time */ in sprd_mbox_send_data()
246 /* Enable inbox FIFO overflow and delivery interrupt */ in sprd_mbox_startup()
275 /* Disable inbox & outbox interrupt */ in sprd_mbox_shutdown()
309 * Unisoc mailbox uses an inbox to send messages to the target in sprd_mbox_probe()
314 * register addresses and IRQ numbers for inbox and outbox. in sprd_mbox_probe()
316 * If necessary, a supplementary inbox could be enabled optionally in sprd_mbox_probe()
[all …]
/linux/Documentation/devicetree/bindings/mailbox/
H A Dsprd-mailbox.yaml22 - description: inbox registers' base address
32 - const: inbox
67 interrupt-names = "inbox", "outbox";
/linux/Documentation/scsi/
H A Dbfa.rst78 and use the following inbox and out-of-box driver version mapping to find
82 Inbox Version Out-of-box Version
/linux/arch/arm/boot/dts/mediatek/
H A Dmt6582-prestigio-pmt5008-3g.dts3 * Copyright (c) 2021 Maxim Kutnij <gtk3@inbox.ru>
H A Dmt6582.dtsi3 * Copyright (c) 2021 Maxim Kutnij <gtk3@inbox.ru>
/linux/drivers/infiniband/hw/mlx5/
H A Ddevx.h15 u32 dinlen; /* destroy inbox length */
/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddmub_outbox.c34 * Sends inbox cmd to dmub for enabling outbox notifications to x86.
/linux/drivers/comedi/drivers/
H A Damcc_s5933.h53 #define INTCSR_INBOX_FULL_INT 0x1000 /* enable inbox full interrupt */
54 /* read, or write clear inbox full interrupt */
/linux/arch/arm/mach-sa1100/
H A Dh3600.c6 * Copyright (c) 2009 Dmitry Artamonow <mad_soft@inbox.ru>
/linux/arch/arm/mach-sa1100/include/mach/
H A Dh3xxx.h6 * (c) 2009 Dmitry Artamonow <mad_soft@inbox.ru>
/linux/drivers/gpu/drm/amd/display/dmub/src/
H A Ddmub_dcn20.c89 /* Cached inbox is not supported in this fw version range */ in dmub_dcn20_use_cached_inbox()
277 /* New firmware can support CW4 for the inbox. */ in dmub_dcn20_setup_mailbox()
/linux/drivers/net/ethernet/intel/ixgbevf/
H A Dmbx.c337 * ixgbevf_read_mbx_vf - Reads a message from the inbox intended for VF
373 * ixgbevf_read_mbx_vf_legacy - Reads a message from the inbox intended for VF
/linux/Documentation/process/
H A Demail-clients.rst222 set spoolfile = imaps://imap.gmail.com/INBOX
357 HacKerMaiL (hkml) is a public-inbox based simple mails management tool that
/linux/drivers/input/touchscreen/
H A Dipaq-micro-ts.c6 * Author : Dmitry Artamonow <mad_soft@inbox.ru>
/linux/Documentation/translations/zh_CN/process/
H A Demail-clients.rst203 set spoolfile = imaps://imap.gmail.com/INBOX
/linux/Documentation/translations/zh_TW/process/
H A Demail-clients.rst204 set spoolfile = imaps://imap.gmail.com/INBOX
/linux/include/linux/mlx5/
H A Dfs.h229 /* inbox should be set with the following values:

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