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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8qxp-ss-lsio.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2020 NXP
8 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
9 gpio-ranges = <&iomuxc 1 56 12>,
17 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
18 gpio-ranges = <&iomuxc 0 89 9>,
24 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
25 gpio-ranges = <&iomuxc 0 123 1>,
31 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
32 gpio-ranges = <&iomuxc 0 146 4>,
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H A Dimx8dxl-ss-lsio.dtsi1 // SPDX-License-Identifier: GPL-2.0+
7 compatible = "nxp,imx8dxl-fspi";
12 compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
14 gpio-ranges = <&iomuxc 0 47 13>,
21 compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
23 gpio-ranges = <&iomuxc 4 74 5>,
28 compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
30 gpio-ranges = <&iomuxc 1 98 2>,
36 compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
38 gpio-ranges = <&iomuxc 0 115 4>,
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/linux/Documentation/devicetree/bindings/firmware/
H A Dfsl,scu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dong Aisheng <aisheng.dong@nxp.com>
13 The System Controller Firmware (SCFW) is a low-level system function
14 which runs on a dedicated Cortex-M core to provide power, clock, and
17 The AP communicates with the SC using a multi-ported MU module found
18 in the LSIO subsystem. The current definition of this MU module provides
20 (TZ, HV, standard Linux, etc.). The SC side of this MU module interfaces
21 with the LSIO DSC IP bus. The SC firmware will communicate with this MU
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/linux/Documentation/devicetree/bindings/mailbox/
H A Dfsl,mu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/fsl,mu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX Messaging Unit (MU)
10 - Dong Aisheng <aisheng.dong@nxp.com>
15 and control) through the MU interface. The MU also provides the ability
18 Because the MU manages the messaging between processors, the MU uses
20 Therefore, the MU must synchronize the accesses from one side to the
21 other. The MU accomplishes synchronization using two sets of matching
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/linux/Documentation/devicetree/bindings/remoteproc/
H A Dfsl,imx-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX Co-Processor
10 This binding provides support for ARM Cortex M4 Co-processor found on some NXP iMX SoCs.
13 - Peng Fan <peng.fan@nxp.com>
18 - fsl,imx6sx-cm4
19 - fsl,imx7d-cm4
20 - fsl,imx7ulp-cm4
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/linux/drivers/pmdomain/imx/
H A Dscu-pd.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2018 NXP
10 * single global power domain and implement the ->attach|detach_dev()
12 * From within the ->attach_dev(), we could get the OF node for
13 * the device that is being attached and then parse the power-domain
18 * Additionally, we need to implement the ->stop() and ->start()
20 * rather than using the above ->power_on|off() callbacks.
23 * 1. The ->attach_dev() of power domain infrastructure still does
32 * Update: Genpd assigns the ->of_node for the virtual device before it
33 * invokes ->attach_dev() callback, hence parsing for device resources via
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