Searched +full:imx8qxp +full:- +full:hsio (Results 1 – 6 of 6) sorted by relevance
/linux/Documentation/devicetree/bindings/phy/ |
H A D | fsl,imx8qm-hsio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/fsl,imx8qm-hsio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale i.MX8QM SoC series High Speed IO(HSIO) SERDES PHY 10 - Richard Zhu <hongxing.zhu@nxp.com> 15 - fsl,imx8qm-hsio 16 - fsl,imx8qxp-hsio 19 - description: Base address and length of the PHY block 20 - description: HSIO control and status registers(CSR) of the PHY [all …]
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/linux/Documentation/devicetree/bindings/clock/ |
H A D | imx8qxp-lpcg.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/imx8qxp-lpcg.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX8QXP LPCG (Low-Power Clock Gating) Clock 10 - Aisheng Dong <aisheng.dong@nxp.com> 13 The Low-Power Clock Gate (LPCG) modules contain a local programming 24 include/dt-bindings/clock/imx8-lpcg.h 29 - const: fsl,imx8qxp-lpcg 30 - items: [all …]
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/linux/drivers/phy/freescale/ |
H A D | phy-fsl-imx8qm-hsio.c | 1 // SPDX-License-Identifier: GPL-2.0+ 19 #include <dt-bindings/phy/phy.h> 20 #include <dt-bindings/phy/phy-imx8-pcie.h> 29 /* i.MX8Q HSIO registers */ 120 struct imx_hsio_priv *priv = lane->priv; in imx_hsio_init() 121 struct device *dev = priv->dev; in imx_hsio_init() 124 switch (lane->phy_type) { in imx_hsio_init() 126 lane->phy_mode = PHY_MODE_PCIE; in imx_hsio_init() 127 if (lane->ctrl_index == 0) { /* PCIEA */ in imx_hsio_init() 128 lane->ctrl_off = 0; in imx_hsio_init() [all …]
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8qm.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2019 NXP 7 #include <dt-bindings/clock/imx8-lpcg.h> 8 #include <dt-bindings/firmware/imx/rsrc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/pinctrl/pads-imx8qm.h> 12 #include <dt-bindings/thermal/thermal.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; [all …]
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H A D | imx8dxl-evk.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 6 /dts-v1/; 12 compatible = "fsl,imx8dxl-evk", "fsl,imx8dxl"; 24 stdout-path = &lpuart0; 27 imx8dxl-cm4 { 28 compatible = "fsl,imx8qxp-cm4"; 30 mbox-names = "tx", "rx", "rxdb"; 32 memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>, 34 power-domains = <&pd IMX_SC_R_M4_0_PID0>, <&pd IMX_SC_R_M4_0_MU_1A>; 35 fsl,resource-id = <IMX_SC_R_M4_0_PID0>; [all …]
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/linux/drivers/pmdomain/imx/ |
H A D | scu-pd.c | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * Copyright 2017-2018 NXP 10 * single global power domain and implement the ->attach|detach_dev() 12 * From within the ->attach_dev(), we could get the OF node for 13 * the device that is being attached and then parse the power-domain 18 * Additionally, we need to implement the ->stop() and ->start() 20 * rather than using the above ->power_on|off() callbacks. 23 * 1. The ->attach_dev() of power domain infrastructure still does 32 * Update: Genpd assigns the ->of_node for the virtual device before it 33 * invokes ->attach_dev() callback, hence parsing for device resources via [all …]
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