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Searched +full:imx8qxp +full:- +full:dc +full:- +full:pixel +full:- +full:engine (Results 1 – 6 of 6) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/display/imx/
H A Dfsl,imx8qxp-dc-pixel-engine.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-pixel-engine.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX8qxp Display Controller Pixel Engine
10 All Processing Units that operate in the AXI bus clock domain. Pixel
13 functions. Interconnection of Processing Units is re-configurable.
16 - Liu Ying <victor.liu@nxp.com>
20 const: fsl,imx8qxp-dc-pixel-engine
28 "#address-cells":
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H A Dfsl,imx8qxp-dc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The Freescale i.MX8qxp Display Controller(DC) is comprised of three main
11 components that include a blit engine for 2D graphics accelerations, display
17 +---------------------------+------------+------------------+-+-+------+
18 | Display Controller (DC) | .......... | | | | |
20 | @@@@@@@@@@@ +----------+------------+------------+ | | | |
22 X <-+->| Sequencer | | @@@@@@@@@@@@@@@@@@@@@@@@@@@@ | V V V |
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H A Dfsl,imx8qxp-dc-display-engine.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-display-engine.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX8qxp Display Controller Display Engine
10 All Processing Units that operate in a display clock domain. Pixel pipeline
15 - Liu Ying <victor.liu@nxp.com>
19 const: fsl,imx8qxp-dc-display-engine
24 reg-names:
26 - const: top
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H A Dfsl,imx8qxp-dc-scaling-engine.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-scaling-engine.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX8qxp Display Controller Scaling Engine
11 re-sampling with 1/32 sub pixel precision.
22 are LSBit precise (e.g. DC ripple free).
24 +-----------+
27 +-----------+
31 |\ +-----------+
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H A Dfsl,imx8qxp-dc-extdst.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-extdst.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The External Destination unit is the interface between the internal pixel
11 processing pipeline of the Pixel Engine, which is 30-bit RGB plus 8-bit Alpha,
12 and a Display Engine.
14 It comprises the following built-in Gamma apply function.
16 +------X-----------------------+
19 | +-------+ |
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H A Dfsl,imx8qxp-dc-matrix.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-matrix.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The unit supports linear color transformation, alpha pre-multiply and
14 - Liu Ying <victor.liu@nxp.com>
18 const: fsl,imx8qxp-dc-matrix
24 reg-names:
26 - const: cfg # matrix in display engine
27 - items: # matrix in pixel engine
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