Searched +full:imx8qxp +full:- +full:dc +full:- +full:fetchlayer (Results 1 – 2 of 2) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-pixel-engine.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#13 functions. Interconnection of Processing Units is re-configurable.16 - Liu Ying <victor.liu@nxp.com>20 const: fsl,imx8qxp-dc-pixel-engine28 "#address-cells":31 "#size-cells":37 "^blit-engine@[0-9a-f]+$":[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-fetchunit.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#11 and the internal pixel processing pipeline, which is 30-bit RGB plus 8-bit15 planes in Blit Engines, and comprises the following built-in functions to18 +---------X-----------------------------------------+21 | +---------+ |25 | +---------+ |28 | +---------+ |[all …]