Searched +full:imx8mp +full:- +full:hsio +full:- +full:blk +full:- +full:ctrl (Results 1 – 3 of 3) sorted by relevance
| /linux/Documentation/devicetree/bindings/soc/imx/ |
| H A D | fsl,imx8mp-hsio-blk-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MP HSIO blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MP HSIO blk-ctrl is a top-level peripheral providing access to
14 the NoC and ensuring proper power sequencing of the high-speed IO
15 (USB an PCIe) peripherals located in the HSIO domain of the SoC.
20 - const: fsl,imx8mp-hsio-blk-ctrl
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| /linux/drivers/pmdomain/imx/ |
| H A D | imx8mp-blk-ctrl.c | 1 // SPDX-License-Identifier: GPL-2.0+
9 #include <linux/clk-provider.h>
19 #include <dt-bindings/power/imx8mp-power.h>
104 regmap_update_bits(clk->regmap, GPR_REG2, in clk_hsio_pll_prepare()
110 /* de-assert PLL reset */ in clk_hsio_pll_prepare()
111 regmap_update_bits(clk->regmap, GPR_REG3, PLL_RST, PLL_RST); in clk_hsio_pll_prepare()
114 regmap_update_bits(clk->regmap, GPR_REG3, PLL_CKE, PLL_CKE); in clk_hsio_pll_prepare()
116 return regmap_read_poll_timeout(clk->regmap, GPR_REG1, val, in clk_hsio_pll_prepare()
124 regmap_update_bits(clk->regmap, GPR_REG3, PLL_RST | PLL_CKE, 0); in clk_hsio_pll_unprepare()
131 return regmap_test_bits(clk->regmap, GPR_REG1, PLL_LOCK); in clk_hsio_pll_is_prepared()
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx95.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
6 #include <dt-bindings/clock/nxp,imx95-clock.h>
7 #include <dt-bindings/dma/fsl-edma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/thermal/thermal.h>
13 #include "imx95-clock.h"
14 #include "imx95-pinfunc.h"
15 #include "imx95-power.h"
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