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Searched +full:imx7ulp +full:- +full:smc1 (Results 1 – 4 of 4) sorted by relevance

/linux/Documentation/devicetree/bindings/arm/freescale/
H A Dfsl,imx7ulp-pm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/freescale/fsl,imx7ulp-pm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - A.s. Dong <aisheng.dong@nxp.com>
13 The Multi-System Mode Controller (MSMC) is responsible for sequencing
26 const: fsl,imx7ulp-smc1
32 - compatible
33 - reg
38 - |
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7ulp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2018 NXP
8 #include <dt-bindings/clock/imx7ulp-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "imx7ulp-pinfunc.h"
15 interrupt-parent = <&intc>;
17 #address-cells = <1>;
18 #size-cells = <1>;
37 #address-cells = <1>;
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/linux/arch/arm/mach-imx/
H A Dpm-imx7ulp.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2018 NXP
51 return -EINVAL; in imx7ulp_set_lpm()
63 np = of_find_compatible_node(NULL, NULL, "fsl,imx7ulp-smc1"); in imx7ulp_pm_init()
/linux/drivers/clk/imx/
H A Dclk-imx7ulp.c1 // SPDX-License-Identifier: GPL-2.0+
10 #include <dt-bindings/clock/imx7ulp-clock.h>
11 #include <linux/clk-provider.h>
57 clk_data->num = IMX7ULP_CLK_SCG1_END; in imx7ulp_clk_scg1_init()
58 hws = clk_data->hws; in imx7ulp_clk_scg1_init()
111 …re", hws[IMX7ULP_CLK_CORE_DIV]->clk, hws[IMX7ULP_CLK_SYS_SEL]->clk, hws[IMX7ULP_CLK_SPLL_SEL]->clk… in imx7ulp_clk_scg1_init()
113 …IMX7ULP_CLK_HSRUN_CORE_DIV]->clk, hws[IMX7ULP_CLK_HSRUN_SYS_SEL]->clk, hws[IMX7ULP_CLK_SPLL_SEL]->… in imx7ulp_clk_scg1_init()
129 imx_check_clk_hws(hws, clk_data->num); in imx7ulp_clk_scg1_init()
133 CLK_OF_DECLARE(imx7ulp_clk_scg1, "fsl,imx7ulp-scg1", imx7ulp_clk_scg1_init);
146 clk_data->num = IMX7ULP_CLK_PCC2_END; in imx7ulp_clk_pcc2_init()
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