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Searched +full:imx7ulp +full:- +full:smc1 (Results 1 – 3 of 3) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/arm/freescale/
H A Dfsl,imx7ulp-pm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/freescale/fsl,imx7ulp-pm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - A.s. Dong <aisheng.dong@nxp.com>
13 The Multi-System Mode Controller (MSMC) is responsible for sequencing
26 const: fsl,imx7ulp-smc1
32 - compatible
33 - reg
38 - |
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H A Dfsl,imx7ulp-pm.txt2 ----------------------------------------------
4 The Multi-System Mode Controller (MSMC) is responsible for sequencing
16 - compatible: Should be "fsl,imx7ulp-smc1".
17 - reg: Specifies base physical address and size of the register sets.
20 smc1: smc1@40410000 {
21 compatible = "fsl,imx7ulp-smc1";
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx7ulp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2018 NXP
8 #include <dt-bindings/clock/imx7ulp-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controlle
290 smc1: clock-controller@40410000 { global() label
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