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Searched +full:imx35 +full:- +full:gpio (Results 1 – 14 of 14) sorted by relevance

/linux/arch/arm64/boot/dts/freescale/
H A Dimx8qxp-ss-lsio.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2020 NXP
8 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
9 gpio-ranges = <&iomuxc 1 56 12>,
17 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
18 gpio-ranges = <&iomuxc 0 89 9>,
24 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
25 gpio-ranges = <&iomuxc 0 123 1>,
31 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
32 gpio-ranges = <&iomuxc 0 146 4>,
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H A Dimx8qm-ss-lsio.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2019-2020 NXP
8 compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";
9 gpio-ranges = <&iomuxc 0 0 6>,
15 compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";
16 gpio-ranges = <&iomuxc 0 40 4>,
23 compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";
24 gpio-ranges = <&iomuxc 0 80 4>,
30 compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";
31 gpio-ranges = <&iomuxc 0 114 2>,
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H A Dimx8dxl-ss-lsio.dtsi1 // SPDX-License-Identifier: GPL-2.0+
7 compatible = "nxp,imx8dxl-fspi";
12 compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
14 gpio-ranges = <&iomuxc 0 47 13>,
21 compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
23 gpio-ranges = <&iomuxc 4 74 5>,
28 compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
30 gpio-ranges = <&iomuxc 1 98 2>,
36 compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
38 gpio-ranges = <&iomuxc 0 115 4>,
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H A Dimx8mn.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/power/imx8mn-power.h>
8 #include <dt-bindings/reset/imx8mq-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mn-pinfunc.h"
17 interrupt-parent = <&gic>;
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H A Dimx8mp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mp-clock.h>
7 #include <dt-bindings/power/imx8mp-power.h>
8 #include <dt-bindings/reset/imx8mp-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interconnect/fsl,imx8mp.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
15 #include "imx8mp-pinfunc.h"
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/linux/Documentation/devicetree/bindings/gpio/
H A Dfsl-imx-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/gpio/fsl-imx-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX/MXC GPIO controller
10 - Shawn Guo <shawnguo@kernel.org>
11 - Sascha Hauer <s.hauer@pengutronix.de>
12 - Fabio Estevam <festevam@gmail.com>
17 - enum:
18 - fsl,imx1-gpio
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimxrt1050.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "../../armv7-m.dtsi"
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/imxrt1050-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
18 compatible = "fixed-clock";
19 #clock-cells = <0>;
20 clock-frequency = <24000000>;
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H A Dimx25.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 #include <dt-bindings/gpio/gpio.h>
6 #include "imx25-pinfunc.h"
9 #address-cells = <1>;
10 #size-cells = <1>;
13 * pre-existing /chosen node to be available to insert the
46 #address-cells = <1>;
47 #size-cells = <0>;
50 compatible = "arm,arm926ej-s";
56 asic: asic-interrupt-controller@68000000 {
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H A Dimx6qdl.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/imx6qdl-clock.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 * pre-existing /chosen node to be available to insert the
58 compatible = "fixed-clock";
59 #clock-cells = <0>;
60 clock-frequency = <32768>;
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H A Dimx7s.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/imx7-reset.h>
12 #include "imx7d-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <1>;
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/linux/Documentation/devicetree/bindings/net/can/
H A Dfsl,flexcan.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC).
11 - Marc Kleine-Budde <mkl@pengutronix.de>
14 - $ref: can-controller.yaml#
19 - enum:
20 - fsl,imx95-flexcan
21 - fsl,imx93-flexcan
22 - fsl,imx8qm-flexcan
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/linux/drivers/gpio/
H A Dgpio-mxc.c1 // SPDX-License-Identifier: GPL-2.0+
3 // MXC GPIO support. (c) 2008 Daniel Mack <daniel@caiaq.de>
8 // Copyright (C) 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved.
24 #include <linux/gpio/driver.h>
86 .edge_sel_reg = -EINVAL,
101 .edge_sel_reg = -EINVAL,
123 #define GPIO_DR (port->hwdata->dr_reg)
124 #define GPIO_GDIR (port->hwdata->gdir_reg)
125 #define GPIO_PSR (port->hwdata->psr_reg)
126 #define GPIO_ICR1 (port->hwdata->icr1_reg)
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/linux/sound/soc/fsl/
H A Dfsl_ssi.c1 // SPDX-License-Identifier: GPL-2.0
7 // Copyright 2007-2010 Freescale Semiconductor, Inc.
9 // Some notes why imx-pcm-fiq is used instead of DMA on some boards:
15 // was developed with always sends GPIO status data in slot 12 which
16 // we receive in our (PCM-) data stream. The only chance we have is to
19 // between pcm data and GPIO status data changes. Our FIQ handler is not
43 #include <linux/dma/imx-dma.h>
53 #include "imx-pcm.h"
55 /* Define RX and TX to index ssi->regvals array; Can be 0 or 1 only */
66 * (bit-endianness must match byte-endianness). Processors typically write
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/linux/drivers/spi/
H A Dspi-imx.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
11 #include <linux/dma-mapping.h>
30 #include <linux/dma/imx-dma.h>
138 return d->devtype_data->devtype == IMX27_CSPI; in is_imx27_cspi()
143 return d->devtype_data->devtype == IMX35_CSPI; in is_imx35_cspi()
148 return d->devtype_data->devtype == IMX51_ECSPI; in is_imx51_ecspi()
153 return d->devtype_data->devtype == IMX53_ECSPI; in is_imx53_ecspi()
159 unsigned int val = readl(spi_imx->base + MXC_CSPIRXDATA); \
161 if (spi_imx->rx_buf) { \
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