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Searched +full:imx25 +full:- +full:ccm (Results 1 – 4 of 4) sorted by relevance

/linux/Documentation/devicetree/bindings/clock/
H A Dimx25-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/imx25-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sascha Hauer <s.hauer@pengutronix.de>
18 --------------------------
152 const: fsl,imx25-ccm
160 '#clock-cells':
164 - compatible
165 - reg
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx25.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 #include <dt-bindings/gpio/gpio.h>
6 #include "imx25-pinfunc.h"
9 #address-cells = <1>;
10 #size-cells = <1>;
13 * pre-existing /chosen node to be available to insert the
46 #address-cells = <1>;
47 #size-cells = <0>;
50 compatible = "arm,arm926ej-s";
56 asic: asic-interrupt-controller@68000000 {
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/linux/drivers/clk/imx/
H A Dclk-imx25.c1 // SPDX-License-Identifier: GPL-2.0-or-later
42 #define ccm(x) (ccm_base + (x)) macro
82 clk[mpll] = imx_clk_pllv1(IMX_PLLV1_IMX25, "mpll", "osc", ccm(CCM_MPCTL)); in __mx25_clocks_init()
83 clk[upll] = imx_clk_pllv1(IMX_PLLV1_IMX25, "upll", "osc", ccm(CCM_UPCTL)); in __mx25_clocks_init()
85 …clk[cpu_sel] = imx_clk_mux("cpu_sel", ccm(CCM_CCTL), 14, 1, cpu_sel_clks, ARRAY_SIZE(cpu_sel_clks)… in __mx25_clocks_init()
86 clk[cpu] = imx_clk_divider("cpu", "cpu_sel", ccm(CCM_CCTL), 30, 2); in __mx25_clocks_init()
87 clk[ahb] = imx_clk_divider("ahb", "cpu", ccm(CCM_CCTL), 28, 2); in __mx25_clocks_init()
88 clk[usb_div] = imx_clk_divider("usb_div", "upll", ccm(CCM_CCTL), 16, 6); in __mx25_clocks_init()
90 …clk[per0_sel] = imx_clk_mux("per0_sel", ccm(CCM_MCR), 0, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)… in __mx25_clocks_init()
91 …clk[per1_sel] = imx_clk_mux("per1_sel", ccm(CCM_MCR), 1, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)… in __mx25_clocks_init()
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/linux/arch/arm/mach-imx/
H A Davic.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
19 #include "irq-common.h"
29 #define AVIC_NIPRIORITY(x) (0x20 + 4 * (7 - (x))) /* int priority */
57 return -EINVAL; in avic_set_irq_fiq()
63 hwirq -= AVIC_NUM_IRQS / 2; in avic_set_irq_fiq()
85 struct irq_chip_type *ct = gc->chip_types; in avic_irq_suspend()
86 int idx = d->hwirq >> 5; in avic_irq_suspend()
88 avic_saved_mask_reg[idx] = imx_readl(avic_base + ct->regs.mask); in avic_irq_suspend()
89 imx_writel(gc->wake_active, avic_base + ct->regs.mask); in avic_irq_suspend()
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