Searched +full:imx21 +full:- +full:owire (Results 1 – 6 of 6) sorted by relevance
1 // SPDX-License-Identifier: GPL-2.0+5 #include "imx27-pinfunc.h"7 #include <dt-bindings/clock/imx27-clock.h>8 #include <dt-bindings/gpio/gpio.h>9 #include <dt-bindings/input/input.h>10 #include <dt-bindings/interrupt-controller/irq.h>13 #address-cells = <1>;14 #size-cells = <1>;17 * pre-existing /chosen node to be available to insert the43 aitc: aitc-interrupt-controller@10040000 {[all …]
1 // SPDX-License-Identifier: GPL-2.0+7 #include "imx50-pinfunc.h"8 #include <dt-bindings/gpio/gpio.h>9 #include <dt-bindings/clock/imx5-clock.h>12 #address-cells = <1>;13 #size-cells = <1>;16 * pre-existing /chosen node to be available to insert the47 #address-cells = <1>;48 #size-cells = <0>;51 compatible = "arm,cortex-a8";[all …]
1 // SPDX-License-Identifier: GPL-2.0+6 #include "imx51-pinfunc.h"7 #include <dt-bindings/clock/imx5-clock.h>8 #include <dt-bindings/gpio/gpio.h>9 #include <dt-bindings/input/input.h>10 #include <dt-bindings/interrupt-controller/irq.h>13 #address-cells = <1>;14 #size-cells = <1>;17 * pre-existing /chosen node to be available to insert the42 tzic: tz-interrupt-controller@e0000000 {[all …]
1 // SPDX-License-Identifier: GPL-2.0+6 #include "imx53-pinfunc.h"7 #include <dt-bindings/clock/imx5-clock.h>8 #include <dt-bindings/gpio/gpio.h>9 #include <dt-bindings/input/input.h>10 #include <dt-bindings/interrupt-controller/irq.h>13 #address-cells = <1>;14 #size-cells = <1>;17 * pre-existing /chosen node to be available to insert the50 #address-cells = <1>;[all …]
1 // SPDX-License-Identifier: GPL-2.0+5 #include <dt-bindings/gpio/gpio.h>6 #include "imx25-pinfunc.h"9 #address-cells = <1>;10 #size-cells = <1>;13 * pre-existing /chosen node to be available to insert the46 #address-cells = <1>;47 #size-cells = <0>;50 compatible = "arm,arm926ej-s";56 asic: asic-interrupt-controller@68000000 {[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later3 * Copyright 2005-2008 Freescale Semiconductor, Inc. All Rights Reserved.22 # define MXC_W1_CONTROL_WR(x) BIT(5 - (x))45 writeb(MXC_W1_CONTROL_RPP, dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_reset_bus()53 u8 ctrl = readb(dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_reset_bus()55 /* PST bit is valid after the RPP bit is self-cleared */ in mxc_w1_ds2_reset_bus()73 writeb(MXC_W1_CONTROL_WR(bit), dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_touch_bit()81 u8 ctrl = readb(dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_touch_bit()83 /* RDST bit is valid after the WR1/RD bit is self-cleared */ in mxc_w1_ds2_touch_bit()98 mdev = devm_kzalloc(&pdev->dev, sizeof(struct mxc_w1_device), in mxc_w1_probe()[all …]