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/freebsd/sys/contrib/device-tree/Bindings/arm/freescale/
H A Dfsl,scu.txt2 --------------------------------------------------------------------
4 The System Controller Firmware (SCFW) is a low-level system function
5 which runs on a dedicated Cortex-M core to provide power, clock, and
9 The AP communicates with the SC using a multi-ported MU module found
19 The scu node with the following properties shall be under the /firmware/ node.
22 -------------------
23 - compatible: should be "fsl,imx-scu".
24 - mbox-names: should include "tx0", "tx1", "tx2", "tx3",
27 - mboxes: List of phandle of 4 MU channels for tx, 4 MU channels for
60 i.MX SCU Client Device Node:
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/freebsd/sys/contrib/device-tree/Bindings/firmware/
H A Dfsl,scu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/fsl,scu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dong Aisheng <aisheng.dong@nxp.com>
13 The System Controller Firmware (SCFW) is a low-level system function
14 which runs on a dedicated Cortex-M core to provide power, clock, and
17 The AP communicates with the SC using a multi-ported MU module found
26 const: fsl,imx-scu
28 clock-controller:
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/freebsd/sys/contrib/device-tree/Bindings/input/
H A Dfsl,scu-key.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/input/fsl,scu
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/freebsd/sys/contrib/device-tree/Bindings/watchdog/
H A Dfsl,scu-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/fsl,scu
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/freebsd/sys/contrib/device-tree/Bindings/thermal/
H A Dfsl,scu-thermal.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/fsl,scu-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: i.MX SCU Client Device Node - Thermal Based on SCU Message Protocol
10 - Dong Aisheng <aisheng.dong@nxp.com>
12 description: i.MX SCU Client Device Node
13 Client nodes are maintained as children of the relevant IMX-SCU device node.
16 - $ref: thermal-sensor.yaml#
21 - enum:
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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dfsl,scu-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/fsl,scu-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: i.MX SCU Client Device Node - Pinctrl Based on SCU Message Protocol
10 - Dong Aisheng <aisheng.dong@nxp.com>
12 description: i.MX SCU Client Device Node
13 Client nodes are maintained as children of the relevant IMX-SCU device node.
15 (Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt)
18 - $ref: pinctrl.yaml#
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8dxl.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/imx8-clock.h>
7 #include <dt-bindings/dma/fsl-edma.h>
8 #include <dt-bindings/clock/imx8-lpcg.h>
9 #include <dt-bindings/firmware/imx/rsrc.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/pinctrl/pads-imx8dxl.h>
14 #include <dt-bindings/thermal/thermal.h>
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H A Dimx8qxp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2020 NXP
8 #include <dt-bindings/clock/imx8-clock.h>
9 #include <dt-bindings/clock/imx8-lpcg.h>
10 #include <dt-bindings/firmware/imx/rsrc.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/pinctrl/pads-imx8qxp.h>
15 #include <dt-bindings/thermal/thermal.h>
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H A Dimx8qm.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/firmware/imx/rsrc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/pads-imx8qm.h>
12 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
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H A Dimx8-ss-dma.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/dma/fsl-edma.h>
9 #include <dt-bindings/firmware/imx/rsrc.h>
11 dma_ipg_clk: clock-dma-ipg {
12 compatible = "fixed-clock";
13 #clock-cells = <0>;
14 clock-frequency = <120000000>;
15 clock-output-names = "dma_ipg_clk";
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/freebsd/sys/contrib/device-tree/Bindings/power/
H A Dfsl,scu-pd.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/fsl,scu
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/freebsd/sys/contrib/device-tree/Bindings/nvmem/
H A Dfsl,scu-ocotp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/fsl,scu-ocotp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: i.MX SCU Client Device Node - OCOTP Based on SCU Message Protocol
10 - Dong Aisheng <aisheng.dong@nxp.com>
12 description: i.MX SCU Client Device Node
13 Client nodes are maintained as children of the relevant IMX-SCU device node.
16 - $ref: nvmem.yaml#
21 - fsl,imx8qm-scu-ocotp
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/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dfsl,scu-clk.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/fsl,scu-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: i.MX SCU Client Device Node - Clock Controller Based on SCU Message Protocol
10 - Abel Vesa <abel.vesa@nxp.com>
12 description: i.MX SCU Client Device Node
13 Client nodes are maintained as children of the relevant IMX-SCU device node.
15 (Documentation/devicetree/bindings/clock/clock-bindings.txt)
18 include/dt-bindings/clock/imx8qxp-clock.h
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H A Dimx8qxp-lpcg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/imx8qxp-lpcg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8QXP LPCG (Low-Power Clock Gating) Clock
10 - Aisheng Dong <aisheng.dong@nxp.com>
13 The Low-Power Clock Gate (LPCG) modules contain a local programming
18 by the SCU resources and clock controls. Thus even if the clock is
24 include/dt-bindings/clock/imx8-lpcg.h
29 - const: fsl,imx8qxp-lpcg
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/freebsd/sys/contrib/device-tree/Bindings/rtc/
H A Dfsl,scu-rtc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/fsl,scu-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: i.MX SCU Client Device Node - RTC Based on SCU Message Protocol
10 - Dong Aisheng <aisheng.dong@nxp.com>
12 description: i.MX SCU Client Device Node
13 Client nodes are maintained as children of the relevant IMX-SCU device node.
16 - $ref: rtc.yaml#
20 const: fsl,imx8qxp-sc-rtc
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/freebsd/sys/arm/freescale/imx/
H A Dimx6_machdep.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
45 #include <arm/freescale/imx/imx6_anatopreg.h>
46 #include <arm/freescale/imx/imx6_anatopvar.h>
47 #include <arm/freescale/imx/imx_machdep.h>
52 #include <arm/freescale/imx/imx6_machdep.h>
67 * interrupt controller, which is for use when the chip is in deep-sleep mode.
68 * We don't support deep sleep or have a GPC-PIC driver; we need all interrupts
74 * set the world right by just changing the interrupt-parent property of the soc
83 * - SOC node exists and has GPC as its interrupt parent.
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H A Dimx6_mp.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2014 Juergen Weiss <weiss@uni-mainz.de>
47 #include <arm/freescale/imx/imx6_machdep.h>
76 bus_space_handle_t scu; in imx6_mp_setmaxid() local
84 if (bus_space_map(fdtbus_bs_tag, SCU_PHYSBASE, SCU_SIZE, 0, &scu) != 0) in imx6_mp_setmaxid()
85 panic("Couldn't map the SCU\n"); in imx6_mp_setmaxid()
86 val = bus_space_read_4(fdtbus_bs_tag, scu, SCU_CONFIG_REG); in imx6_mp_setmaxid()
88 bus_space_unmap(fdtbus_bs_tag, scu, SCU_SIZE); in imx6_mp_setmaxid()
96 mp_maxid = ncpu - 1; in imx6_mp_setmaxid()
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/freebsd/sys/contrib/device-tree/Bindings/gpio/
H A Dfsl,imx8qxp-sc-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/fsl,imx8qxp-sc-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO driver over IMX SCU firmware API
10 - Shenwei Wang <shenwei.wang@nxp.com>
14 resource pins in SCU domain on i.MX8 platforms.
19 - fsl,imx8qxp-sc-gpio
21 "#gpio-cells":
24 gpio-controller: true
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/freebsd/sys/contrib/device-tree/Bindings/remoteproc/
H A Dfsl,imx-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX Co-Processor
10 This binding provides support for ARM Cortex M4 Co-processor found on some NXP iMX SoCs.
13 - Peng Fan <peng.fan@nxp.com>
18 - fsl,imx6sx-cm4
19 - fsl,imx7d-cm4
20 - fsl,imx7ulp-cm4
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/freebsd/sys/contrib/device-tree/Bindings/display/bridge/
H A Dfsl,imx8qxp-pxl2dpi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pxl2dpi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
14 interfaces the pixel link 36-bit data output and the DSI controller’s
15 MIPI-DPI 24-bit data input, and inputs of LVDS Display Bridge(LDB) module
25 const: fsl,imx8qxp-pxl2dpi
27 fsl,sc-resource:
29 description: The SCU resource ID associated with this PXL2DPI instance.
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/freebsd/sys/contrib/device-tree/Bindings/bus/
H A Dfsl,imx8qxp-pixel-link-msi-bus.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/fsl,imx8qxp-pixe
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