implies (full) in projects: linux - OpenGrok search results

Project(s)

Full Search
Definition
Symbol
File Path
History
Type

Searched full:implies (Results 1 – 25 of 597) sorted by relevance

12 3 4 5 6 7 8 9 10 >>...24

/linux/tools/perf/pmu-events/arch/x86/skylake/
H A D	virtual-memory.json	7 … data loads that caused a page walk of any page size (4K/2M/4M/1G). This implies it missed in all … 35 …completed page walks (all page sizes) caused by demand data loads. This implies it missed in the … 44 …ounts completed page walks (1G sizes) caused by demand data loads. This implies address translati… 53 …ts completed page walks (2M/4M sizes) caused by demand data loads. This implies address translati… 62 …ounts completed page walks (4K sizes) caused by demand data loads. This implies address translati… 80 …data stores that caused a page walk of any page size (4K/2M/4M/1G). This implies it missed in all … 108 …ompleted page walks (all page sizes) caused by demand data stores. This implies it missed in the … 117 …unts completed page walks (1G sizes) caused by demand data stores. This implies address translati… 126 …s completed page walks (2M/4M sizes) caused by demand data stores. This implies address translati… 135 …unts completed page walks (4K sizes) caused by demand data stores. This implies address translati… [all …]
/linux/tools/perf/pmu-events/arch/x86/skylakex/
H A D	virtual-memory.json	7 … data loads that caused a page walk of any page size (4K/2M/4M/1G). This implies it missed in all … 35 …completed page walks (all page sizes) caused by demand data loads. This implies it missed in the … 44 …ounts completed page walks (1G sizes) caused by demand data loads. This implies address translati… 53 …ts completed page walks (2M/4M sizes) caused by demand data loads. This implies address translati… 62 …ounts completed page walks (4K sizes) caused by demand data loads. This implies address translati… 80 …data stores that caused a page walk of any page size (4K/2M/4M/1G). This implies it missed in all … 108 …ompleted page walks (all page sizes) caused by demand data stores. This implies it missed in the … 117 …unts completed page walks (1G sizes) caused by demand data stores. This implies address translati… 126 …s completed page walks (2M/4M sizes) caused by demand data stores. This implies address translati… 135 …unts completed page walks (4K sizes) caused by demand data stores. This implies address translati… [all …]
/linux/tools/perf/pmu-events/arch/x86/cascadelakex/
H A D	virtual-memory.json	7 … data loads that caused a page walk of any page size (4K/2M/4M/1G). This implies it missed in all … 35 …completed page walks (all page sizes) caused by demand data loads. This implies it missed in the … 44 …ounts completed page walks (1G sizes) caused by demand data loads. This implies address translati… 53 …ts completed page walks (2M/4M sizes) caused by demand data loads. This implies address translati… 62 …ounts completed page walks (4K sizes) caused by demand data loads. This implies address translati… 80 …data stores that caused a page walk of any page size (4K/2M/4M/1G). This implies it missed in all … 108 …ompleted page walks (all page sizes) caused by demand data stores. This implies it missed in the … 117 …unts completed page walks (1G sizes) caused by demand data stores. This implies address translati… 126 …s completed page walks (2M/4M sizes) caused by demand data stores. This implies address translati… 135 …unts completed page walks (4K sizes) caused by demand data stores. This implies address translati… [all …]
/linux/tools/perf/pmu-events/arch/x86/icelakex/
H A D	virtual-memory.json	26 …completed page walks (all page sizes) caused by demand data loads. This implies it missed in the … 35 …ounts completed page walks (1G sizes) caused by demand data loads. This implies address translati… 44 …ts completed page walks (2M/4M sizes) caused by demand data loads. This implies address translati… 53 …ounts completed page walks (4K sizes) caused by demand data loads. This implies address translati… 90 …ompleted page walks (all page sizes) caused by demand data stores. This implies it missed in the … 99 …unts completed page walks (1G sizes) caused by demand data stores. This implies address translati… 108 …s completed page walks (2M/4M sizes) caused by demand data stores. This implies address translati… 117 …unts completed page walks (4K sizes) caused by demand data stores. This implies address translati… 154 …ounts completed page walks (all page sizes) caused by a code fetch. This implies it missed in the … 163 …nts completed page walks (2M/4M page sizes) caused by a code fetch. This implies it missed in the … [all …]
/linux/tools/perf/pmu-events/arch/x86/rocketlake/
H A D	virtual-memory.json	26 "PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 35 "PublicDescription": "Counts completed page walks (1G sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 44 "PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 53 "PublicDescription": "Counts completed page walks (4K sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 90 "PublicDescription": "Counts completed page walks (all page sizes) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 99 "PublicDescription": "Counts completed page walks (1G sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 108 "PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 117 "PublicDescription": "Counts completed page walks (4K sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 154 "PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.", 163 "PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This implies i [all...]
/linux/tools/perf/pmu-events/arch/x86/icelake/
H A D	virtual-memory.json	26 "PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 35 "PublicDescription": "Counts completed page walks (1G sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 44 "PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 53 "PublicDescription": "Counts completed page walks (4K sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 90 "PublicDescription": "Counts completed page walks (all page sizes) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 99 "PublicDescription": "Counts completed page walks (1G sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 108 "PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 117 "PublicDescription": "Counts completed page walks (4K sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 154 "PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.", 163 "PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This implies i [all...]
/linux/tools/perf/pmu-events/arch/x86/tigerlake/
H A D	virtual-memory.json	26 "PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 35 "PublicDescription": "Counts completed page walks (1G sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 44 "PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 53 "PublicDescription": "Counts completed page walks (4K sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 90 "PublicDescription": "Counts completed page walks (all page sizes) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 154 "PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.", 163 "PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.", 172 "PublicDescription": "Counts completed page walks (4K page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.",
/linux/arch/xtensa/include/asm/
H A D	asm-uaccess.h	`31 * <error>. This implies that the macro falls through to the next 42 * <error> label to branch to on error; implies fall-through 61 * <error>. This implies that the macro falls through to the next 72 * <error> label to branch to on error; implies fall-through`
/linux/tools/perf/pmu-events/arch/x86/silvermont/
H A D	virtual-memory.json	`17 …page walk or instruction (I) page walk is in progress. Since a pagewalk implies a TLB miss, the a… 36 …ts when a data (D) page walk is completed or started. Since a page walk implies a TLB miss, the n… 55 …an instruction (I) page walk is completed or started. Since a page walk implies a TLB miss, the n… 65 …an instruction (I) page walk is completed or started. Since a page walk implies a TLB miss, the n…`
/linux/tools/perf/pmu-events/arch/x86/lunarlake/
H A D	virtual-memory.json	83 "PublicDescription": "Counts completed page walks (all page sizes) caused by demand data loads. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 93 "PublicDescription": "Counts completed page walks (1G sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 113 "PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 133 "PublicDescription": "Counts completed page walks (4K sizes) caused by demand data loads. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 222 "PublicDescription": "Counts completed page walks (all page sizes) caused by demand data stores. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 232 "PublicDescription": "Counts completed page walks (1G sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 252 "PublicDescription": "Counts completed page walks (2M/4M sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 272 "PublicDescription": "Counts completed page walks (4K sizes) caused by demand data stores. This implies address translations missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.", 370 "PublicDescription": "Counts completed page walks (all page sizes) caused by a code fetch. This implies it missed in the ITLB (Instruction TLB) and further levels of TLB. The page walk can end with or without a fault.", 390 "PublicDescription": "Counts completed page walks (2M/4M page sizes) caused by a code fetch. This implies i [all...]
/linux/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/
H A D	counters.rst	952 on a physical port. If this counter is increasing, it implies that the 959 size on a physical port. If this counter is increasing, it implies that 979 this counter is increasing, it implies that the network is congested and 985 this counter is increasing, it implies that the NIC is congested and 996 physical port. If this counter is increasing, it implies that the adapter 1014 implies that the peer connected to the adapter has a non-standard MTU 1021 increasing, it implies that the peer connected to the adapter has a 1145 interface. If this counter is increasing, it implies that the link 1154 (RS/FC). If this counter is increasing, it implies that the link between 1163 increasing, it implies that the link between the NIC and the network is [all …]
/linux/arch/mips/include/asm/
H A D	bitops.h	`140 * clear_bit() is atomic and implies release semantics before the memory 176 * This operation is atomic and implies acquire ordering semantics 206 * It also implies a memory barrier. 221 * It also implies a memory barrier. 258 * It also implies a memory barrier. 315 * __clear_bit() is non-atomic and implies release semantics before the memory`
/linux/tools/perf/pmu-events/arch/powerpc/power10/
H A D	frontend.json	`5 …"BriefDescription": "Data TLB hit (DERAT reload) page size 2M. Implies radix translation. When MMC… 55 …"BriefDescription": "Instruction TLB hit (IERAT reload) page size 1G, which implies Radix Page Tab… 95 …"BriefDescription": "Data TLB hit (DERAT reload) page size 1G. Implies radix translation. When MMC…`
H A D	memory.json	`20 …"BriefDescription": "Data TLB reload (after a miss) page size 2M. Implies radix translation was us… 55 …"BriefDescription": "Data ERAT Miss (Data TLB Access) page size 1G. Implies radix translation. Whe… 115 …"BriefDescription": "Data TLB reload (after a miss) page size 1G. Implies radix translation was us…`
/linux/arch/powerpc/perf/
H A D	hv-gpci.c	152 * ret value as H_AUTHORITY implies that partition is not permitted to retrieve in systeminfo_gpci_request() 206 * starting_index value implies the starting hardware in processor_bus_topology_show() 220 * implies that buffer can't accommodate all information, and a partial buffer in processor_bus_topology_show() 274 * starting_index value implies the starting hardware in processor_config_show() 288 * implies that buffer can't accommodate all information, and a partial buffer in processor_config_show() 356 * implies that buffer can't accommodate all information, and a partial buffer in affinity_domain_via_virtual_processor_show() 426 * implies that buffer can't accommodate all information, and a partial buffer in affinity_domain_via_domain_show() 541 * ret value as 'H_PARAMETER' implies that the current buffer size in affinity_domain_via_partition_show() 598 * ret value as H_AUTHORITY implies that partition is not permitted to retrieve in affinity_domain_via_partition_show() 816 * ret value as H_AUTHORITY implies that partition is not permitted to retrieve in h_gpci_event_init()
/linux/arch/arm/common/
H A D	mcpm_head.S	`103 bl vlock_trylock @ implies DMB 118 @ Control dependency implies strb not observable before previous ldrb. 165 bl vlock_unlock @ implies DMB`
H A D	vlock.S	`61 @ Control dependency implies strb not observable before previous ldrb. 65 voting_end r0, r1, r2 @ implies DMB`
/linux/Documentation/devicetree/bindings/pinctrl/
H A D	pinctrl-vt8500.txt	`26 listed. In other words, a subnode that lists only a mux function implies no 28 a pull parameter implies no information about the mux function.`
H A D	lantiq,pinctrl-falcon.txt	`23 parameters implies no information about any pin configuration parameters. 24 Similarly, a pin subnode that describes a pullup parameter implies no`
H A D	brcm,bcm2835-gpio.txt	`42 listed. In other words, a subnode that lists only a mux function implies no 44 a pul parameter implies no information about the mux function.`
H A D	pinctrl-palmas.txt	`27 parameters implies no information about any pin configuration parameters. 28 Similarly, a pin subnode that describes a pullup parameter implies no`
H A D	nvidia,tegra124-xusb-padctl.txt	`46 implies no information about any pin configuration parameters. Similarly, a 47 subnode that describes only an IDDQ parameter implies no information about`
/linux/Documentation/userspace-api/media/rc/
H A D	lirc-get-features.rst	59 :ref:`LIRC_MODE_MODE2 <lirc-mode-MODE2>` is used. This also implies 151 :ref:`LIRC_MODE_PULSE <lirc-mode-pulse>`. This implies that
/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A D	pmc.yaml	`76 whose PMC is compatible, and implies deep-sleep capability. 80 whose PMC is compatible, and implies deep-sleep capability.`
/linux/drivers/net/ethernet/intel/ice/
H A D	ice_virtchnl_fdir.c	`474 * @tun: 0 implies non-tunnel type filter, 1 implies tunnel type filter 628 * @tun: 0 implies non-tunnel type filter, 1 implies tunnel type filter 741 * @tun: 0 implies non-tunnel type filter, 1 implies tunnel type filter 1384 * @add: true implies add rule, false implies del rules 1385 * @is_tun: false implies non-tunnel type filter, true implies tunnel filter 1671 * @success: true implies success, false implies failure 1736 * @success: true implies success, false implies failure`

12 3 4 5 6 7 8 9 10 >>...24