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/freebsd/sys/contrib/device-tree/Bindings/watchdog/
H A Datmel-sama5d4-wdt.txt4 - compatible: "atmel,sama5d4-wdt" or "microchip,sam9x60-wdt"
5 - reg: base physical address and length of memory mapped region.
8 - timeout-sec: watchdog timeout value (in seconds).
9 - interrupts: interrupt number to the CPU.
10 - atmel,watchdog-type: should be "hardware" or "software".
15 - atmel,idle-halt: present if you want to stop the watchdog when the CPU is
16 in idle state.
18 watchdog not counting when the CPU is in idle state, therefore the
20 if the CPU stop working while it is in idle state, which is probably
22 - atmel,dbg-halt: present if you want to stop the watchdog when the CPU is
[all …]
H A Datmel-wdt.txt3 ** at91sam9-wdt
6 - compatible: must be "atmel,at91sam9260-wdt".
7 - reg: physical base address of the controller and length of memory mapped
9 - clocks: phandle to input clock.
12 - timeout-sec: contains the watchdog timeout in seconds.
13 - interrupts : Should contain WDT interrupt.
14 - atmel,max-heartbeat-sec : Should contain the maximum heartbeat value in
17 - atmel,min-heartbeat-sec : Should contain the minimum heartbeat value in
18 seconds. This value must be smaller than the max-heartbeat-sec value.
20 - atmel,watchdog-type : Should be "hardware" or "software". Hardware watchdog
[all …]
H A Datmel,sama5d4-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/atmel,sama5d4-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eugen Hristev <eugen.hristev@microchip.com>
13 - $ref: watchdog.yaml#
18 - enum:
19 - atmel,sama5d4-wdt
20 - microchip,sam9x60-wdt
21 - microchip,sama7g5-wdt
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H A Datmel,at91sam9-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/watchdog/atmel,at91sam9-wdt.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Eugen Hristev <eugen.hristev@microchip.com>
15 const: atmel,at91sam9260-wdt
26 atmel,max-heartbeat-sec:
32 atmel,min-heartbeat-sec:
35 must be smaller than the max-heartbeat-sec value. It is used to
39 atmel,watchdog-type:
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsc7280-chrome-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
20 /delete-node/ &cdsp_mem;
21 /delete-node/ &domain_idle_states;
22 /delete-node/ &gpu_zap_mem;
23 /delete-node/ &gpu_zap_shader;
24 /delete-node/ &hyp_mem;
25 /delete-node/ &xbl_mem;
26 /delete-node/ &reserved_xbl_uefi_log;
27 /delete-node/ &sec_apps_mem;
31 domain_idle_states: domain-idle-states {
[all …]
H A Dsdm630.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,gcc-sdm660.h>
8 #include <dt-bindings/clock/qcom,gpucc-sdm660.h>
9 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
10 #include <dt-bindings/clock/qcom,rpmcc.h>
11 #include <dt-bindings/firmware/qcom,scm.h>
12 #include <dt-bindings/interconnect/qcom,sdm660.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
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H A Dqcs404.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-qcs404.h>
8 #include <dt-bindings/clock/qcom,turingcc-qcs404.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/power/qcom-rpmpd.h>
11 #include <dt-bindings/thermal/thermal.h>
14 interrupt-parent = <&intc>;
16 #address-cells = <2>;
17 #size-cells = <2>;
[all …]
H A Dmsm8998.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/firmware/qcom,scm.h>
10 #include <dt-bindings/power/qcom-rpmpd.h>
11 #include <dt-bindings/gpio/gpio.h>
14 interrupt-parent = <&intc>;
[all …]
H A Dmsm8939.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2020-2023, Linaro Limited
7 #include <dt-bindings/clock/qcom,gcc-msm8939.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/interconnect/qcom,msm8939.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/qcom-rpmpd.h>
12 #include <dt-bindings/reset/qcom,gcc-msm8939.h>
13 #include <dt-bindings/soc/qcom,apr.h>
[all …]
H A Dmsm8916.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
6 #include <dt-bindings/arm/coresight-cti-dt.h>
7 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/interconnect/qcom,msm8916.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/qcom-rpmpd.h>
12 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
13 #include <dt-bindings/soc/qcom,apr.h>
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H A Dsdm845.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
12 #include <dt-bindings/clock/qcom,lpass-sdm845.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sdm845.h>
15 #include <dt-bindings/dma/qcom-gpi.h>
16 #include <dt-bindings/firmware/qcom,scm.h>
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/freebsd/share/man/man4/
H A Dxen.45 .\" Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
46 "para-virtualized" as the x86 instruction set was not fully virtualizable.
47 Primarily, para-virtualization modifies the virtual memory system to use
49 modify the TLB, although para-virtualized device drivers were also required
54 supported; this is referred to as hardware-assisted virtualization (HVM and PVH).
56 peripherals, or para-virtualized drivers, which are aware of virtualization,
59 PVH configurations rely on para-virtualized drivers exclusively for IO.
62 Para-virtualized device drivers are required in order to support certain
63 functionality, such as processing management requests, returning idle
66 These para-virtualized drivers are supported:
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H A Dddb.422 .\" Pittsburgh PA 15213-3890
35 .Bd -ragged -offset indent
42 .Bd -ragged -offset indent
48 .Bd -ragged -offset indent
54 .Bd -ragged -offset indent
63 .Bd -ragged -offset indent
83 MIB variable is set non-zero,
97 is already set non-zero.
146 of -1 is equivalent to a missing
161 .Dq Li --More--
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/freebsd/sys/dev/acpica/
H A Dacpi_cpu.c1 /*-
2 * Copyright (c) 2003-2005 Nate Lawson (SDG)
59 * Support for ACPI Processor devices, including C[1-3] sleep states.
68 uint32_t type; /* C1-3 (C4 and up treated as C3). */
89 int cpu_prev_sleep;/* Last idle sleep duration. */
92 int cpu_non_c2; /* Index of lowest non-C2 state. */
93 int cpu_non_c3; /* Index of lowest non-C3 state. */
100 int cpu_disable_idle; /* Disable entry to idle function */
117 #define CPU_QUIRK_NO_C3 (1<<0) /* C3-type states are not usable. */
260 device_printf(dev, "probe failed to get Processor obj - %s\n", in acpi_cpu_probe()
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/freebsd/sys/dev/mii/
H A Dicsphyreg.h3 /*-
4 * SPDX-License-Identifier: BSD-2-Clause
44 *--------------------------------------------------------------
49 * 4 Auto-Neg. Advertisement * * *
50 * 5 Auto-Neg. Link Parent Adv * * *
51 * 6 Auto-Neg. Expansion * * *
52 * 7 Auto-Neg. Next Page Tx * *
56 * 12 10Base-T Operation * * *
77 #define QPR_HALT 0x0040 /* Halt Symbol Detected */
78 #define QPR_PREEM 0x0020 /* Two Idle Symbols together */
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/freebsd/sys/contrib/ncsw/Peripherals/QM/
H A Dqm.h3 � 1995-2003, 2004, 2005-2011 Freescale Semiconductor, Inc.
138 /* Corenet initiator settings. Stash request queues are 4-deep to match cores'
146 /* QM-Portal defaults */
187 …volatile uint32_t qcsp_dd_ihrsr; /**< Software Portal DD Internal Halt Request Stat…
188 …volatile uint32_t qcsp_dd_ihrfr; /**< Software Portal DD Internal Halt Request Forc…
189 … volatile uint32_t qcsp_dd_hasr; /**< Software Portal DD Halt Acknowledge Status */
191 volatile uint32_t dcp_dd_ihrsr; /**< DCP DD Internal Halt Request Status */
192 volatile uint32_t dcp_dd_ihrfr; /**< DCP DD Internal Halt Request Force */
193 volatile uint32_t dcp_dd_hasr; /**< DCP DD Halt Acknowledge Status */
260 volatile uint32_t idle_stat; /**< QMan Idle Status Register */
[all …]
/freebsd/sys/riscv/riscv/
H A Dmp_machdep.c1 /*-
11 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
100 /* Stacks for AP initialization, discarded once idle threads are started. */
111 void *dpcpu[MAXCPU - 1];
160 cpuid -= boot_hart; in init_secondary()
166 /* Workaround: make sure wfi doesn't halt the hart */ in init_secondary()
176 KASSERT(PCPU_GET(idlethread) != NULL, ("no idle thread")); in init_secondary()
177 pcpup->pc_curthread = pcpup->pc_idlethread; in init_secondary()
184 /* Start per-CPU event timers. */ in init_secondary()
189 CPU_SET_ATOMIC(hart, &kernel_pmap->pm_active); in init_secondary()
[all …]
/freebsd/sys/amd64/vmm/
H A Dvmm.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
107 int reqidle; /* (i) request vcpu to idle */
109 void *cookie; /* (i) cpu-specific data */
128 #define vcpu_lock_init(v) mtx_init(&((v)->mtx), "vcpu lock", 0, MTX_SPIN)
129 #define vcpu_lock_destroy(v) mtx_destroy(&((v)->mtx))
130 #define vcpu_lock(v) mtx_lock_spin(&((v)->mtx))
131 #define vcpu_unlock(v) mtx_unlock_spin(&((v)->mtx))
132 #define vcpu_assert_locked(v) mtx_assert(&((v)->mtx), MA_OWNED)
146 void *cookie; /* (i) cpu-specific data */
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/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_mci.c73 if (!(ah->ah_config.ath_hal_mci_config & in ar9300_mci_osla_setup()
80 thresh = MS(ah->ah_config.ath_hal_mci_config, in ar9300_mci_osla_setup()
147 time_out -= 10; in ar9300_mci_wait_for_interrupt()
219 if ((ahp->ah_mci_coex_bt_version_known == AH_FALSE) && in ar9300_mci_send_coex_version_query()
220 (ahp->ah_mci_bt_state != MCI_BT_SLEEP)) { in ar9300_mci_send_coex_version_query()
238 ahp->ah_mci_coex_major_version_wlan; in ar9300_mci_send_coex_version_response()
240 ahp->ah_mci_coex_minor_version_wlan; in ar9300_mci_send_coex_version_response()
248 u_int32_t *payload = &ahp->ah_mci_coex_wlan_channels[0]; in ar9300_mci_send_coex_wlan_channels()
250 if ((ahp->ah_mci_coex_wlan_channels_update == AH_TRUE) && in ar9300_mci_send_coex_wlan_channels()
251 (ahp->ah_mci_bt_state != MCI_BT_SLEEP)) in ar9300_mci_send_coex_wlan_channels()
[all …]
/freebsd/sys/x86/x86/
H A Dcpu_machdep.c1 /*-
131 switch (a->op) { in x86_msr_op_one()
133 v = rdmsr(a->msr); in x86_msr_op_one()
134 v &= ~a->arg1; in x86_msr_op_one()
135 wrmsr(a->msr, v); in x86_msr_op_one()
138 v = rdmsr(a->msr); in x86_msr_op_one()
139 v |= a->arg1; in x86_msr_op_one()
140 wrmsr(a->msr, v); in x86_msr_op_one()
143 wrmsr(a->msr, a->arg1); in x86_msr_op_one()
146 v = rdmsr(a->msr); in x86_msr_op_one()
[all …]
H A Dmp_x86.c1 /*-
90 int boot_cpu_id = -1; /* designated BSP */
156 static int intr_apic_id_limit = -1;
159 "Maximum permitted APIC ID for interrupt delivery (-1 is unlimited)");
181 if (mem_range_softc.mr_op && mem_range_softc.mr_op->initAP) in mem_range_AP_init()
182 mem_range_softc.mr_op->initAP(&mem_range_softc); in mem_range_AP_init()
186 * Compute ceil(log2(x)). Returns -1 if x is zero.
192 return (x == 0 ? -1 : order_base_2(x)); in mask_width()
215 if (caches[level - 1].present) { in add_deterministic_cache()
217 printf("%u => %u\n", caches[level - 1].id_shift, in add_deterministic_cache()
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/freebsd/sys/riscv/vmm/
H A Dvmm.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
91 void *cookie; /* (i) cpu-specific data */
95 #define vcpu_lock_initialized(v) mtx_initialized(&((v)->mtx))
96 #define vcpu_lock_init(v) mtx_init(&((v)->mtx), "vcpu lock", 0, MTX_SPIN)
97 #define vcpu_lock_destroy(v) mtx_destroy(&((v)->mtx))
98 #define vcpu_lock(v) mtx_lock_spin(&((v)->mtx))
99 #define vcpu_unlock(v) mtx_unlock_spin(&((v)->mtx))
100 #define vcpu_assert_locked(v) mtx_assert(&((v)->mtx), MA_OWNED)
117 void *cookie; /* (i) cpu-specific data */
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/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_dbg_fw_funcs.c2 * Copyright (c) 2017-2018 Cavium, Inc.
115 /* Idle check conditions */
168 return (r[0] < (r[1] - imm[0])); in cond8()
175 /* Array of Idle Check conditions */
226 * Addresses are in bytes, sizes are in quad-regs.
363 …, val_width, amount) (((val) | ((val) << (val_width))) >> (amount)) & ((1 << (val_width)) - 1)
371 #define FIELD_BIT_MASK(type, field) (((1 << FIELD_BIT_SIZE(type, field)) - 1) << FIELD_DWORD_SHIF…
390 #define NUM_EXTRA_DBG_LINES(block_desc) (1 + (block_desc->has_latency_events ? 1 : 0))
391 #define NUM_DBG_LINES(block_desc) (block_desc->num_of_lines + NUM_EXTRA_DBG_LINES(block_desc))
457 #define MAX_CYCLE_VALUES_MASK ((1 << VALUES_PER_CYCLE) - 1)
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/freebsd/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-msm8974.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interconnect/qcom,msm8974.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
[all …]
/freebsd/sys/arm64/vmm/
H A Dvmm.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
87 void *cookie; /* (i) cpu-specific data */
91 #define vcpu_lock_initialized(v) mtx_initialized(&((v)->mtx))
92 #define vcpu_lock_init(v) mtx_init(&((v)->mtx), "vcpu lock", 0, MTX_SPIN)
93 #define vcpu_lock_destroy(v) mtx_destroy(&((v)->mtx))
94 #define vcpu_lock(v) mtx_lock_spin(&((v)->mtx))
95 #define vcpu_unlock(v) mtx_unlock_spin(&((v)->mtx))
96 #define vcpu_assert_locked(v) mtx_assert(&((v)->mtx), MA_OWNED)
122 void *cookie; /* (i) cpu-specific data */
[all …]

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