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/linux/Documentation/devicetree/bindings/misc/
H A Dfsl,qoriq-mc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/misc/fsl,qoriq-mc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
13 The Freescale Management Complex (fsl-mc) is a hardware resource
15 network-oriented packet processing applications. After the fsl-mc
22 For an overview of the DPAA2 architecture and fsl-mc bus see:
26 same hardware "isolation context" and a 10-bit value called an ICID
31 between ICIDs and IOMMUs, so an iommu-map property is used to define
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/linux/drivers/bus/fsl-mc/
H A Dfsl-mc-msi.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-2016 Freescale Semiconductor, Inc.
16 #include "fsl-mc-private.h"
21 * irqdomain. Combine the icid with the interrupt index.
27 * Make the base hwirq value for ICID*10000 so it is readable in fsl_mc_domain_calc_hwirq()
30 return (irq_hw_number_t)(desc->msi_index + (dev->icid * 10000)); in fsl_mc_domain_calc_hwirq()
36 arg->desc = desc; in fsl_mc_msi_set_desc()
37 arg->hwirq = fsl_mc_domain_calc_hwirq(to_fsl_mc_device(desc->dev), in fsl_mc_msi_set_desc()
46 struct msi_domain_ops *ops = info->ops; in fsl_mc_msi_update_dom_ops()
54 if (!ops->set_desc) in fsl_mc_msi_update_dom_ops()
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H A Dfsl-mc-private.h1 /* SPDX-License-Identifier: GPL-2.0 */
165 __le32 icid; member
194 /* response word 3-4 */
196 /* response word 5-6 */
206 /* cmd word 1-2 */
208 /* cmd word 3-4 */
239 /* cmd word 3-4 */
273 /* IRQ event - Indicates that a new object added to the container */
275 /* IRQ event - Indicates that an object was removed from the container */
278 * IRQ event - Indicates that one of the descendant containers that opened by
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H A Ddprc.c1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright 2013-2016 Freescale Semiconductor Inc.
10 #include "fsl-mc-private.h"
20 * dprc_open() - Open DPRC object for use
43 cmd_params->container_id = cpu_to_le32(container_id); in dprc_open()
58 * dprc_close() - Close the control session of the object
84 * dprc_reset_container - Reset child container.
90 * - 0 (no bits set) - all the objects inside the container are
94 * - bit 0 set - all the objects inside the container are reset.
97 * In case a software context crashes or becomes non-responsive, the parent
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/linux/Documentation/virt/kvm/devices/
H A Darm-vgic-its.rst1 .. SPDX-License-Identifier: GPL-2.0
10 The ITS allows MSI(-X) interrupts to be injected into guests. This extension is
12 arm-vgic-v3.txt), but does not depend on having physical ITS controllers.
15 a separate, non-overlapping MMIO region.
22 -------------------------
25 KVM_VGIC_ITS_ADDR_TYPE (rw, 64-bit)
26 Base address in the guest physical address space of the GICv3 ITS
33 -E2BIG Address outside of addressable IPA range
34 -EINVAL Incorrectly aligned address
35 -EEXIST Address already configured
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/linux/drivers/infiniband/hw/qedr/
H A Dverbs.c2 * Copyright (c) 2015-2016 QLogic Corporation
14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
32 #include <linux/dma-mapping.h>
52 #include <rdma/qedr-abi.h>
70 size_t min_len = min_t(size_t, len, udata->outlen); in qedr_ib_copy_to_udata()
78 return -EINVAL; in qedr_query_pkey()
89 memset(sgid->raw, 0, sizeof(sgid->raw)); in qedr_iw_query_gid()
90 ether_addr_copy(sgid->raw, dev->ndev->dev_addr); in qedr_iw_query_gid()
93 sgid->global.interface_id, sgid->global.subnet_prefix); in qedr_iw_query_gid()
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/linux/include/linux/qed/
H A Dqed_rdma_if.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
85 /* Abilty to support RNR-NAK generation */
117 /* Abilty to support the base memory management extensions */
282 u16 icid; member
317 u16 icid; member
610 u16 *icid);
H A Dcommon_hsi.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
3 * Copyright (c) 2015-2016 QLogic Corporation
4 * Copyright (c) 2019-2021 Marvell International Ltd.
132 /* Traffic classes in network-facing blocks (PBF, BTB, NIG, BRB, PRS and QM) */
334 (DQ_PWM_OFFSET_TCM32_BASE + DQ_TCM_AGG_VAL_SEL_REG9 - 4)
371 /* Base number of Tx PQs in the CM PQ representation.
382 #define QM_LINE_CRD_REG_SIGN_BIT BIT((QM_LINE_CRD_REG_WIDTH - 1))
384 #define QM_BYTE_CRD_REG_SIGN_BIT BIT((QM_BYTE_CRD_REG_WIDTH - 1))
386 #define QM_WFQ_CRD_REG_SIGN_BIT BIT((QM_WFQ_CRD_REG_WIDTH - 1))
388 #define QM_RL_CRD_REG_SIGN_BIT BIT((QM_RL_CRD_REG_WIDTH - 1))
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/linux/drivers/soc/fsl/dpio/
H A Dqbman-portal.h1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
3 * Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
4 * Copyright 2016-2019 NXP
10 #include <soc/fsl/dpaa2-fd.h>
24 void *cena_bar; /* Cache-enabled portal base address */
25 void __iomem *cinh_bar; /* Cache-inhibited portal base address */
51 /* dequeue with priority precedence, respect intra-class scheduling */
248 * qbman_swp_enqueue() - Issue an enqueue command
253 * Return 0 for successful enqueue, -EBUSY if the EQCR is not ready.
263 * qbman_swp_enqueue_multiple() - Issue a multi enqueue command
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/linux/drivers/crypto/caam/
H A Dregs.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * CAAM hardware register-level view
5 * Copyright 2008-2011 Freescale Semiconductor, Inc.
15 #include <linux/io-64-nonatomic-hi-lo.h>
18 * Architecture-specific register access methods
20 * CAAM's bus-addressable registers are 64 bits internally.
21 * They have been wired to be safely accessible on 32-bit
24 * can be treated as two 32-bit entities, or finally (c) if they
25 * must be treated as a single 64-bit value, then this can safely
26 * be done with two 32-bit cycles.
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/linux/drivers/net/ethernet/qlogic/qed/
H A Dqed_hsi.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2021 Marvell International Ltd.
94 /* Light-L2 RX Producers in Tstorm RAM */
113 /* Light-L2 RX Producers in Tstorm RAM */
144 __le16 icid; /* internal CID */ member
999 /* Event Ring VF-PF Channel data */
1157 /* Mstorm non-triggering VF zone */
1300 /* Protocol-common error code */
1320 /* Pstorm non-triggering VF zone */
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H A Dqed_ll2.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
9 #include <linux/dma-mapping.h>
41 #define QED_LL2_RX_REGISTERED(ll2) ((ll2)->rx_queue.b_cb_registered)
42 #define QED_LL2_TX_REGISTERED(ll2) ((ll2)->tx_queue.b_cb_registered)
83 stats_id = MAX_NUM_LL2_RX_RAM_QUEUES + p_hwfn->abs_pf_id; in qed_ll2_handle_to_stats_id()
99 struct qed_dev *cdev = p_hwfn->cdev; in qed_ll2b_complete_tx_packet()
103 dma_unmap_single(&p_hwfn->cdev->pdev->dev, first_frag_addr, in qed_ll2b_complete_tx_packet()
106 if (cdev->ll2->cbs && cdev->ll2->cbs->tx_cb) in qed_ll2b_complete_tx_packet()
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