Searched +full:i3c +full:- +full:scl +full:- +full:hz (Results 1 – 4 of 4) sorted by relevance
1 // SPDX-License-Identifier: GPL-2.0+3 * Copyright (c) 2021-25 Axiado Corporation (or its affiliates). All rights reserved.6 /dts-v1/;8 #include <dt-bindings/interrupt-controller/irq.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>11 /memreserve/ 0x3c0013a0 0x00000008; /* cpu-release-addr */14 interrupt-parent = <&gic500>;15 #address-cells = <2>;16 #size-cells = <2>;19 #address-cells = <2>;[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/i3c/i3c.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: I3C bus10 - Alexandre Belloni <alexandre.belloni@bootlin.com>11 - Miquel Raynal <miquel.raynal@bootlin.com>14 I3C busses can be described with a node for the primary I3C controller device15 and a set of child nodes for each I2C or I3C slave on the bus. Each of them20 pattern: "^i3c@[0-9a-f]+$"[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/i3c/cdns,i3c-master.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Cadence I3C master block10 - Boris Brezillon <bbrezillon@kernel.org>13 - $ref: i3c.yaml#18 - const: cdns,i3c-master19 - items:20 - enum:[all …]
1 What: /sys/bus/i3c/devices/i3c-<bus-id>3 Contact: linux-i3c@vger.kernel.org5 An I3C bus. This directory will contain one sub-directory per6 I3C device present on the bus.8 What: /sys/bus/i3c/devices/i3c-<bus-id>/current_master10 Contact: linux-i3c@vger.kernel.org12 Expose the master that owns the bus (<bus-id>-<master-pid>) at17 What: /sys/bus/i3c/devices/i3c-<bus-id>/mode19 Contact: linux-i3c@vger.kernel.org21 I3C bus mode. Can be "pure", "mixed-fast" or "mixed-slow". See[all …]