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/freebsd/sys/contrib/device-tree/src/arm64/axiado/
H A Dax3000.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2021-25 Axiado Corporation (or its affiliates). All rights reserved.
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 /memreserve/ 0x3c0013a0 0x00000008; /* cpu-release-addr */
14 interrupt-parent = <&gic500>;
15 #address-cells = <2>;
16 #size-cells = <2>;
19 #address-cells = <2>;
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/freebsd/sys/contrib/device-tree/Bindings/i3c/
H A Dcdns,i3c-master.txt1 Bindings for cadence I3C master block
5 --------------------
6 - compatible: shall be "cdns,i3c-master"
7 - clocks: shall reference the pclk and sysclk
8 - clock-names: shall contain "pclk" and "sysclk"
9 - interrupts: the interrupt line connected to this I3C master
10 - reg: I3C master registers
13 Documentation/devicetree/bindings/i3c/i3c.yaml for more details):
15 - #address-cells: shall be set to 1
16 - #size-cells: shall be set to 0
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H A Di3c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i3c/i3c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: I3C bus
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
11 - Miquel Raynal <miquel.raynal@bootlin.com>
14 I3C busses can be described with a node for the primary I3C controller device
15 and a set of child nodes for each I2C or I3C slave on the bus. Each of them
20 pattern: "^i3c@[0-9a-f]+$"
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H A Di3c.txt1 Generic device tree bindings for I3C busses
4 This document describes generic bindings that should be used to describe I3C
8 -------------------
10 - #address-cells - should be <3>. Read more about addresses below.
11 - #size-cells - should be <0>.
12 - compatible - name of the I3C master controller driving the I3C bus
16 The node describing an I3C bus should be named i3c-master.
19 -------------------
21 These properties may not be supported by all I3C master drivers. Each I3C
24 - i3c-scl-hz: frequency of the SCL signal used for I3C transfers.
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H A Dsnps,dw-i3c-master.txt1 Bindings for Synopsys DesignWare I3C master block
5 --------------------
6 - compatible: shall be "snps,dw-i3c-master-1.00a"
7 - clocks: shall reference the core_clk
8 - interrupts: the interrupt line connected to this I3C master
9 - reg: Offset and length of I3C master registers
12 Documentation/devicetree/bindings/i3c/i3c.yaml for more details):
14 - #address-cells: shall be set to 3
15 - #size-cells: shall be set to 0
18 Documentation/devicetree/bindings/i3c/i3c.yaml for more details):
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H A Dcdns,i3c-master.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i3c/cdns,i3c-master.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence I3C master block
10 - Boris Brezillon <bbrezillon@kernel.org>
13 - $ref: i3c.yaml#
18 - const: cdns,i3c-master
19 - items:
20 - enum:
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx93-9x9-qsb-i3c.dtso1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/i3c/i3c.h>
8 #include <dt-bindings/usb/pd.h>
10 #include "imx93-pinfunc.h"
12 /dts-v1/;
20 pinctrl-names = "default";
21 pinctrl-0 = <&pinctrl_i3c1>;
22 #address-cells = <3>;
23 #size-cells = <0>;
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H A Dimx95-15x15-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/i3c/i3c.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/phy/phy-imx8-pcie.h>
11 #include <dt-bindings/pwm/pwm.h>
12 #include <dt-bindings/usb/pd.h>
25 compatible = "fsl,imx95-15x15-evk", "fsl,imx95";
34 bt_sco_codec: bt-sco-codec {
35 compatible = "linux,bt-sco";
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