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/linux/arch/arm64/boot/dts/axiado/
H A Dax3000.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2021-25 Axiado Corporation (or its affiliates). All rights reserved.
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 /memreserve/ 0x3c0013a0 0x00000008; /* cpu-release-addr */
14 interrupt-parent = <&gic500>;
15 #address-cells = <2>;
16 #size-cells = <2>;
19 #address-cells = <2>;
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/linux/Documentation/devicetree/bindings/i3c/
H A Dsilvaco,i3c-master.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i3c/silvaco,i3c-master.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Silvaco I3C master
10 - Conor Culhane <conor.culhane@silvaco.com>
15 - enum:
16 - nuvoton,npcm845-i3c
17 - silvaco,i3c-master-v1
18 - items:
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H A Dsnps,dw-i3c-master.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i3c/snps,dw-i3c-master.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare I3C master block
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
13 - $ref: i3c.yaml#
18 - const: snps,dw-i3c-master-1.00a
19 - items:
20 - const: altr,agilex5-dw-i3c-master
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H A Dcdns,i3c-master.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i3c/cdns,i3c-master.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence I3C master block
10 - Boris Brezillon <bbrezillon@kernel.org>
13 - $ref: i3c.yaml#
18 - const: cdns,i3c-master
19 - items:
20 - enum:
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H A Di3c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i3c/i3c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: I3C bus
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
11 - Miquel Raynal <miquel.raynal@bootlin.com>
14 I3C busses can be described with a node for the primary I3C controller device
15 and a set of child nodes for each I2C or I3C slave on the bus. Each of them
20 pattern: "^i3c@[0-9a-f]+$"
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/linux/drivers/net/mctp/
H A Dmctp-i3c.c1 // SPDX-License-Identifier: GPL-2.0
4 * "DSP0233 Management Component Transport Protocol (MCTP) I3C Transport
13 #include <linux/i3c/device.h>
14 #include <linux/i3c/master.h>
27 static const int MCTP_I3C_MAXMTU = MCTP_I3C_MAXBUF - 1;
42 static const char *MCTP_I3C_OF_PROP = "mctp-controller";
73 struct i3c_device *i3c; member
82 /* I3C dynamic address */
102 struct i3c_xfer xfer = { .rnw = 1, .len = mi->mrl }; in mctp_i3c_read()
103 struct net_device_stats *stats = &mi->mbus->ndev->stats; in mctp_i3c_read()
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/linux/include/linux/i3c/
H A Dccc.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 #include <linux/i3c/device.h>
14 /* I3C CCC (Common Command Codes) related definitions */
30 /* Broadcast-only commands */
36 /* Unicast-only commands */
56 * struct i3c_ccc_events - payload passed to ENEC/DISEC CCC
69 * struct i3c_ccc_mwl - payload passed to SETMWL/GETMWL CCC
81 * struct i3c_ccc_mrl - payload passed to SETMRL/GETMRL CCC
88 * The IBI length is only valid if the I3C slave is IBI capable
97 * struct i3c_ccc_dev_desc - I3C/I2C device descriptor used for DEFSLVS
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/linux/drivers/i3c/master/
H A Dast2600-i3c-master.c1 // SPDX-License-Identifier: GPL-2.0
14 #include "dw-i3c-master.h"
16 /* AST2600-specific global register set */
68 return -EINVAL; in ast2600_i3c_pullup_to_reg()
79 struct ast2600_i3c *i3c = to_ast2600_i3c(dw); in ast2600_i3c_init() local
84 rc = ast2600_i3c_pullup_to_reg(i3c->sda_pullup, &reg); in ast2600_i3c_init()
88 rc = regmap_write(i3c->global_regs, in ast2600_i3c_init()
89 AST2600_I3CG_REG0(i3c->global_idx), reg); in ast2600_i3c_init()
96 reg = AST2600_I3CG_REG1_INST_ID(i3c->global_idx); in ast2600_i3c_init()
97 rc = regmap_write(i3c->global_regs, in ast2600_i3c_init()
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H A Ddw-i3c-master.c1 // SPDX-License-Identifier: GPL-2.0
15 #include <linux/i3c/master.h>
29 #include "dw-i3c-master.h"
97 #define QUEUE_THLD_CTRL_IBI_STAT(x) (((x) - 1) << 24)
101 #define QUEUE_THLD_CTRL_RESP_BUF(x) (((x) - 1) << 8)
211 #define IBI_SIR_BIT_MOD 32 /* 32-bit vector */
284 if (cmd->ndests > 1) in dw_i3c_master_supports_ccc_cmd()
287 switch (cmd->id) { in dw_i3c_master_supports_ccc_cmd()
319 to_dw_i3c_master(struct i3c_master_controller *master) in to_dw_i3c_master() argument
321 return container_of(master, struct dw_i3c_master, base); in to_dw_i3c_master()
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/linux/drivers/i3c/master/mipi-i3c-hci/
H A Dxfer_mode_rate.h1 /* SPDX-License-Identifier: BSD-3-Clause */
9 * This applies starting from I3C HCI v2.0.
16 * Master Transfer Mode Table Fixed Indexes.
22 #define XFERMODE_IDX_I3C_SDR 0x00 /* I3C SDR Mode */
23 #define XFERMODE_IDX_I3C_HDR_DDR 0x01 /* I3C HDR-DDR Mode */
24 #define XFERMODE_IDX_I3C_HDR_T 0x02 /* I3C HDR-Ternary Mode */
25 #define XFERMODE_IDX_I3C_HDR_BT 0x03 /* I3C HDR-BT Mode */
38 * Master Data Transfer Rate Selector Values.
67 * Master Data Transfer Rate Table Mode ID values.
73 * Master Data Transfer Rate Table Entry Bits Definitions
H A Dcmd_v2.c1 // SPDX-License-Identifier: BSD-3-Clause
7 * I3C HCI v2.0 Command Descriptor Handling
9 * Note: The I3C HCI v2.0 spec is still in flux. The code here will change.
13 #include <linux/i3c/master.h>
66 struct i3c_bus *bus = i3c_master_get_bus(&hci->master); in get_i3c_rate_idx()
68 if (bus->scl_rate.i3c >= 12000000) in get_i3c_rate_idx()
70 if (bus->scl_rate.i3c > 8000000) in get_i3c_rate_idx()
72 if (bus->scl_rate.i3c > 6000000) in get_i3c_rate_idx()
74 if (bus->scl_rate.i3c > 4000000) in get_i3c_rate_idx()
76 if (bus->scl_rate.i3c > 2000000) in get_i3c_rate_idx()
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H A Dcore.c1 // SPDX-License-Identifier: BSD-3-Clause
7 * Core driver code with main interface to the I3C subsystem.
13 #include <linux/i3c/master.h>
17 #include <linux/platform_data/mipi-i3c-hci.h>
37 #define HC_CONTROL_HOT_JOIN_CTRL BIT(8) /* Hot-Join ACK/NACK Control */
41 #define HC_CONTROL_IBA_INCLUDE BIT(0) /* Include I3C Broadcast Address */
43 #define MASTER_DEVICE_ADDR 0x08 /* Master Device Address */
59 #define HC_CAP_NON_CURRENT_MASTER_CAP BIT(5) /* master handoff capable */
107 #define IBI_NOTIFY_MR_REJECTED BIT(1) /* Rejected Master Request Control */
108 #define IBI_NOTIFY_HJ_REJECTED BIT(0) /* Rejected Hot-Join Control */
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H A Dcmd_v1.c1 // SPDX-License-Identifier: BSD-3-Clause
7 * I3C HCI v1.0/v1.1 Command Descriptor Handling
11 #include <linux/i3c/master.h>
122 struct i3c_bus *bus = i3c_master_get_bus(&hci->master); in get_i3c_mode()
124 if (bus->scl_rate.i3c > 8000000) in get_i3c_mode()
126 if (bus->scl_rate.i3c > 6000000) in get_i3c_mode()
128 if (bus->scl_rate.i3c > 4000000) in get_i3c_mode()
130 if (bus->scl_rate.i3c > 2000000) in get_i3c_mode()
137 struct i3c_bus *bus = i3c_master_get_bus(&hci->master); in get_i2c_mode()
139 if (bus->scl_rate.i2c >= 1000000) in get_i2c_mode()
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H A Dhci_quirks.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * I3C HCI Quirks
7 * Authors: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
11 #include <linux/i3c/master.h>
H A Ddma.c1 // SPDX-License-Identifier: BSD-3-Clause
7 * Note: The I3C HCI v2.0 spec is still in flux. The IBI support is based on
13 #include <linux/dma-mapping.h>
15 #include <linux/i3c/master.h>
40 #define rhs_reg_read(r) readl(hci->RHS_regs + (RHS_##r))
41 #define rhs_reg_write(r, v) writel(v, hci->RHS_regs + (RHS_##r))
52 * Ring Header (Per-Ring Bundle)
55 #define rh_reg_read(r) readl(rh->regs + (RH_##r))
56 #define rh_reg_write(r, v) writel(v, rh->regs + (RH_##r))
150 struct hci_rings_data *rings = hci->io_data; in hci_dma_cleanup()
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H A Ddct_v1.c1 // SPDX-License-Identifier: BSD-3-Clause
10 #include <linux/i3c/master.h>
23 void __iomem *reg = hci->DCT_regs + dct_idx * 4 * 4; in i3c_hci_dct_get_val()
32 *pid = ((u64)dct_entry_data[0]) << (47 - 32 + 1) | in i3c_hci_dct_get_val()
/linux/Documentation/driver-api/i3c/
H A Dmaster-driver-api.rst1 .. SPDX-License-Identifier: GPL-2.0
4 I3C master controller driver API
7 .. kernel-doc:: drivers/i3c/master.c
9 .. kernel-doc:: include/linux/i3c/master.h
H A Dindex.rst1 .. SPDX-License-Identifier: GPL-2.0
4 I3C subsystem
10 device-driver-api
11 master-driver-api
/linux/drivers/i3c/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
3 menuconfig I3C config
4 tristate "I3C support"
7 I3C is a serial protocol standardized by the MIPI alliance.
13 The I3C protocol also standardizes the slave device types and is
16 If you want I3C support, you should say Y here and also to the
19 This I3C support can also be built as a module. If so, the module
20 will be called i3c.
22 if I3C
23 source "drivers/i3c/master/Kconfig"
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 i3c-y := device.o master.o
3 obj-$(CONFIG_I3C) += i3c.o
4 obj-$(CONFIG_I3C) += master/
/linux/drivers/iio/imu/inv_icm45600/
H A Dinv_icm45600_i3c.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/i3c/device.h>
10 #include <linux/i3c/master.h>
24 MODULE_DEVICE_TABLE(i3c, inv_icm45600_i3c_ids);
47 return dev_err_probe(&i3cdev->dev, PTR_ERR(regmap), in inv_icm45600_i3c_probe()
48 "Failed to register i3c regmap %ld\n", PTR_ERR(regmap)); in inv_icm45600_i3c_probe()
52 return dev_err_probe(&i3cdev->dev, ret, "Failed to read part id %d\n", whoami); in inv_icm45600_i3c_probe()
55 if (whoami == i3c_chip_info[chip]->whoami) in inv_icm45600_i3c_probe()
60 return dev_err_probe(&i3cdev->dev, -ENODEV, in inv_icm45600_i3c_probe()
77 MODULE_DESCRIPTION("InvenSense ICM-456xx i3c driver");
/linux/drivers/misc/amd-sbi/
H A Drmi-i2c.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * rmi-i2c.c - Side band RMI over I2C support for AMD out
12 #include <linux/i3c/device.h>
13 #include <linux/i3c/master.h>
19 #include "rmi-core.h"
28 * Enable the SB-RMI Software alert status in sbrmi_enable_alert()
31 ret = regmap_read(data->regmap, SBRMI_CTRL, &ctrl); in sbrmi_enable_alert()
37 return regmap_write(data->regmap, SBRMI_CTRL, ctrl); in sbrmi_enable_alert()
52 data->pwr_limit_max = msg.mb_in_out; in sbrmi_get_max_pwr_limit()
64 return -ENOMEM; in sbrmi_common_probe()
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/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,geni-se.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,geni-se.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
15 like UART, SPI, I2C, I3C, etc. A single QUP module can provide upto 8 Serial
23 - qcom,geni-se-qup
24 - qcom,geni-se-i2c-master-hub
30 clock-names:
38 "#address-cells":
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H A Dqcom,sa8255p-geni-se-qup.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,sa8255p-geni-se-qup.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Praveen Talari <quic_ptalari@quicinc.com>
15 like UART, SPI, I2C, I3C, etc. A single QUP module can provide up to 8 Serial
22 const: qcom,sa8255p-geni-se-qup
28 "#address-cells":
31 "#size-cells":
39 dma-coherent: true
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/linux/drivers/iio/adc/
H A Dad4062.c1 // SPDX-License-Identifier: GPL-2.0
3 * Analog Devices AD4062 I3C ADC driver
12 #include <linux/devm-helpers.h>
15 #include <linux/i3c/device.h>
16 #include <linux/i3c/master.h>
154 2000000, 1000000, 300000, 100000, /* 0 - 3 */
155 33300, 10000, 3000, 500, /* 4 - 7 */
156 333, 250, 200, 166, /* 8 - 11 */
157 140, 124, 111, /* 12 - 15 */
268 return sysfs_emit(buf, "%d\n", ad4062_conversion_freqs[st->events_frequency]); in sampling_frequency_show()
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