/linux/Documentation/ABI/testing/ |
H A D | sysfs-bus-i3c | 1 What: /sys/bus/i3c/devices/i3c-<bus-id> 3 Contact: linux-i3c@vger.kernel.org 5 An I3C bus. This directory will contain one sub-directory per 6 I3C device present on the bus. 8 What: /sys/bus/i3c/devices/i3c-<bus-id>/current_master 10 Contact: linux-i3c@vger.kernel.org 12 Expose the master that owns the bus (<bus-id>-<master-pid>) at 17 What: /sys/bus/i3c/devices/i3c-<bus-id>/mode 19 Contact: linux-i3c@vger.kernel.org 21 I3C bus mode. Can be "pure", "mixed-fast" or "mixed-slow". See [all …]
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/linux/arch/arm64/boot/dts/axiado/ |
H A D | ax3000.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (c) 2021-25 Axiado Corporation (or its affiliates). All rights reserved. 6 /dts-v1/; 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 /memreserve/ 0x3c0013a0 0x00000008; /* cpu-release-addr */ 14 interrupt-parent = <&gic500>; 15 #address-cells = <2>; 16 #size-cells = <2>; 19 #address-cells = <2>; [all …]
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/linux/Documentation/devicetree/bindings/i3c/ |
H A D | silvaco,i3c-master.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/i3c/silvaco,i3c-master.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Silvaco I3C master 10 - Conor Culhane <conor.culhane@silvaco.com> 15 - enum: 16 - nuvoton,npcm845-i3c 17 - silvaco,i3c-master-v1 18 - items: [all …]
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H A D | cdns,i3c-master.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/i3c/cdns,i3c-master.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Cadence I3C master block 10 - Boris Brezillon <bbrezillon@kernel.org> 13 - $ref: i3c.yaml# 18 - const: cdns,i3c-master 19 - items: 20 - enum: [all …]
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H A D | i3c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i3c/i3c.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: I3C bus 10 - Alexandre Belloni <alexandre.belloni@bootlin.com> 11 - Miquel Raynal <miquel.raynal@bootlin.com> 14 I3C busses can be described with a node for the primary I3C controller device 15 and a set of child nodes for each I2C or I3C slave on the bus. Each of them 20 pattern: "^i3c@[0-9a-f]+$" [all …]
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/linux/drivers/net/mctp/ |
H A D | mctp-i3c.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * "DSP0233 Management Component Transport Protocol (MCTP) I3C Transport 13 #include <linux/i3c/device.h> 14 #include <linux/i3c/master.h> 27 static const int MCTP_I3C_MAXMTU = MCTP_I3C_MAXBUF - 1; 42 static const char *MCTP_I3C_OF_PROP = "mctp-controller"; 73 struct i3c_device *i3c; member 82 /* I3C dynamic address */ 102 struct i3c_priv_xfer xfer = { .rnw = 1, .len = mi->mrl }; in mctp_i3c_read() 103 struct net_device_stats *stats = &mi->mbus->ndev->stats; in mctp_i3c_read() [all …]
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/linux/include/linux/i3c/ |
H A D | ccc.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 12 #include <linux/i3c/device.h> 14 /* I3C CCC (Common Command Codes) related definitions */ 30 /* Broadcast-only commands */ 36 /* Unicast-only commands */ 56 * struct i3c_ccc_events - payload passed to ENEC/DISEC CCC 69 * struct i3c_ccc_mwl - payload passed to SETMWL/GETMWL CCC 81 * struct i3c_ccc_mrl - payload passed to SETMRL/GETMRL CCC 88 * The IBI length is only valid if the I3C slave is IBI capable 97 * struct i3c_ccc_dev_desc - I3C/I2C device descriptor used for DEFSLVS [all …]
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H A D | device.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 19 * enum i3c_error_code - I3C error codes 21 * @I3C_ERROR_UNKNOWN: unknown error, usually means the error is not I3C 27 * These are the standard error codes as defined by the I3C specification. 28 * When -EIO is returned by the i3c_device_do_priv_xfers() or 42 * enum i3c_hdr_mode - HDR mode ids 54 * struct i3c_priv_xfer - I3C SDR private transfer 59 * @data.in: input buffer. Must point to a DMA-able buffer 60 * @data.out: output buffer. Must point to a DMA-able buffer 61 * @err: I3C error code [all …]
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/linux/drivers/i3c/master/ |
H A D | ast2600-i3c-master.c | 1 // SPDX-License-Identifier: GPL-2.0 14 #include "dw-i3c-master.h" 16 /* AST2600-specific global register set */ 68 return -EINVAL; in ast2600_i3c_pullup_to_reg() 79 struct ast2600_i3c *i3c = to_ast2600_i3c(dw); in ast2600_i3c_init() local 84 rc = ast2600_i3c_pullup_to_reg(i3c->sda_pullup, ®); in ast2600_i3c_init() 88 rc = regmap_write(i3c->global_regs, in ast2600_i3c_init() 89 AST2600_I3CG_REG0(i3c->global_idx), reg); in ast2600_i3c_init() 96 reg = AST2600_I3CG_REG1_INST_ID(i3c->global_idx); in ast2600_i3c_init() 97 rc = regmap_write(i3c->global_regs, in ast2600_i3c_init() [all …]
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H A D | i3c-master-cdns.c | 1 // SPDX-License-Identifier: GPL-2.0 12 #include <linux/i3c/master.h> 423 to_cdns_i3c_master(struct i3c_master_controller *master) in to_cdns_i3c_master() argument 425 return container_of(master, struct cdns_i3c_master, base); in to_cdns_i3c_master() 428 static void cdns_i3c_master_wr_to_tx_fifo(struct cdns_i3c_master *master, in cdns_i3c_master_wr_to_tx_fifo() argument 431 i3c_writel_fifo(master->regs + TX_FIFO, bytes, nbytes); in cdns_i3c_master_wr_to_tx_fifo() 434 static void cdns_i3c_master_rd_from_rx_fifo(struct cdns_i3c_master *master, in cdns_i3c_master_rd_from_rx_fifo() argument 437 i3c_readl_fifo(master->regs + RX_FIFO, bytes, nbytes); in cdns_i3c_master_rd_from_rx_fifo() 443 if (cmd->ndests > 1) in cdns_i3c_master_supports_ccc_cmd() 446 switch (cmd->id) { in cdns_i3c_master_supports_ccc_cmd() [all …]
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/linux/drivers/i3c/master/mipi-i3c-hci/ |
H A D | xfer_mode_rate.h | 1 /* SPDX-License-Identifier: BSD-3-Clause */ 9 * This applies starting from I3C HCI v2.0. 16 * Master Transfer Mode Table Fixed Indexes. 22 #define XFERMODE_IDX_I3C_SDR 0x00 /* I3C SDR Mode */ 23 #define XFERMODE_IDX_I3C_HDR_DDR 0x01 /* I3C HDR-DDR Mode */ 24 #define XFERMODE_IDX_I3C_HDR_T 0x02 /* I3C HDR-Ternary Mode */ 25 #define XFERMODE_IDX_I3C_HDR_BT 0x03 /* I3C HDR-BT Mode */ 38 * Master Data Transfer Rate Selector Values. 67 * Master Data Transfer Rate Table Mode ID values. 73 * Master Data Transfer Rate Table Entry Bits Definitions
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H A D | hci_quirks.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * I3C HCI Quirks 7 * Authors: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> 11 #include <linux/i3c/master.h>
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H A D | dct_v1.c | 1 // SPDX-License-Identifier: BSD-3-Clause 10 #include <linux/i3c/master.h> 23 void __iomem *reg = hci->DCT_regs + dct_idx * 4 * 4; in i3c_hci_dct_get_val() 32 *pid = ((u64)dct_entry_data[0]) << (47 - 32 + 1) | in i3c_hci_dct_get_val()
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/linux/Documentation/driver-api/i3c/ |
H A D | master-driver-api.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 I3C master controller driver API 7 .. kernel-doc:: drivers/i3c/master.c 9 .. kernel-doc:: include/linux/i3c/master.h
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H A D | index.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 I3C subsystem 10 device-driver-api 11 master-driver-api
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/linux/drivers/i3c/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 3 menuconfig I3C config 4 tristate "I3C support" 7 I3C is a serial protocol standardized by the MIPI alliance. 13 The I3C protocol also standardizes the slave device types and is 16 If you want I3C support, you should say Y here and also to the 19 This I3C support can also be built as a module. If so, the module 20 will be called i3c. 22 if I3C 23 source "drivers/i3c/master/Kconfig" [all …]
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H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 i3c-y := device.o master.o 3 obj-$(CONFIG_I3C) += i3c.o 4 obj-$(CONFIG_I3C) += master/
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/linux/drivers/base/regmap/ |
H A D | regmap-i3c.c | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <linux/i3c/device.h> 6 #include <linux/i3c/master.h> 12 struct i3c_device *i3c = dev_to_i3cdev(dev); in regmap_i3c_write() local 21 return i3c_device_do_priv_xfers(i3c, xfers, 1); in regmap_i3c_write() 29 struct i3c_device *i3c = dev_to_i3cdev(dev); in regmap_i3c_read() local 40 return i3c_device_do_priv_xfers(i3c, xfers, 2); in regmap_i3c_read() 48 struct regmap *__devm_regmap_init_i3c(struct i3c_device *i3c, in __devm_regmap_init_i3c() argument 53 return __devm_regmap_init(&i3c->dev, ®map_i3c, &i3c->dev, config, in __devm_regmap_init_i3c() 59 MODULE_DESCRIPTION("regmap I3C Module");
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/linux/Documentation/devicetree/bindings/soc/qcom/ |
H A D | qcom,geni-se.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/qcom/qcom,geni-se.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 15 like UART, SPI, I2C, I3C, etc. A single QUP module can provide upto 8 Serial 23 - qcom,geni-se-qup 24 - qcom,geni-se-i2c-master-hub 30 clock-names: 38 "#address-cells": [all …]
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H A D | qcom,sa8255p-geni-se-qup.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/qcom/qcom,sa8255p-geni-se-qup.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Praveen Talari <quic_ptalari@quicinc.com> 15 like UART, SPI, I2C, I3C, etc. A single QUP module can provide up to 8 Serial 22 const: qcom,sa8255p-geni-se-qup 28 "#address-cells": 31 "#size-cells": 39 dma-coherent: true [all …]
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx95.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT) 6 #include <dt-bindings/clock/nxp,imx95-clock.h> 7 #include <dt-bindings/dma/fsl-edma.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/thermal/thermal.h> 13 #include "imx95-clock.h" 14 #include "imx95-pinfunc.h" 15 #include "imx95-power.h" [all …]
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/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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H A D | CREDITS | 1 This is at least a partial credits-file of people that have 4 scripts. The fields are: name (N), email (E), web-address 6 snail-mail address (S). 10 ---------- 51 D: in-kernel DRM Maintainer 76 E: tim_alpaerts@toyota-motor-europe.com 80 S: B-2610 Wilrijk-Antwerpen 85 W: http://www-stu.christs.cam.ac.uk/~aia21/ 106 D: Maintainer of ide-cd and Uniform CD-ROM driver, 107 D: ATAPI CD-Changer support, Major 2.1.x CD-ROM update. [all …]
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