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/linux/drivers/i3c/master/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "Cadence I3C master driver"
7 Enable this driver if you want to support Cadence I3C master block.
10 tristate "Synospsys DesignWare I3C master driver"
15 Support for Synopsys DesignWare MIPI I3C Controller.
21 will be called dw-i3c-master.
24 tristate "ASPEED AST2600 I3C master driver"
29 Support for ASPEED AST2600 I3C Controller.
31 This hardware is an instance of the DW I3C controller; this
32 driver adds platform- specific support for AST2600 hardware.
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H A Dsvc-i3c-master.c1 // SPDX-License-Identifier: GPL-2.0
3 * Silvaco dual-role I3C master driver
14 #include <linux/i3c/master.h>
24 /* Master Mode Registers */
141 * I3C HW stalls the write transfer if the transmit FIFO becomes empty,
142 * when new data is written to FIFO, I3C HW resumes the transfer but
150 * I3C HW may generate an invalid SlvStart event when emitting a STOP.
157 * corrupted and results in a no repeated-start condition at the end of
195 * struct svc_i3c_master - Silvaco I3C Master structure
196 * @base: I3C master controller
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
2 obj-$(CONFIG_CDNS_I3C_MASTER) += i3c-master-cdns.o
3 obj-$(CONFIG_DW_I3C_MASTER) += dw-i3c-master.o
4 obj-$(CONFIG_AST2600_I3C_MASTER) += ast2600-i3c-master.o
5 obj-$(CONFIG_SVC_I3C_MASTER) += svc-i3c-master.o
6 obj-$(CONFIG_MIPI_I3C_HCI) += mipi-i3c-hci/
H A Dast2600-i3c-master.c1 // SPDX-License-Identifier: GPL-2.0
14 #include "dw-i3c-master.h"
16 /* AST2600-specific global register set */
68 return -EINVAL; in ast2600_i3c_pullup_to_reg()
79 struct ast2600_i3c *i3c = to_ast2600_i3c(dw); in ast2600_i3c_init() local
84 rc = ast2600_i3c_pullup_to_reg(i3c->sda_pullup, &reg); in ast2600_i3c_init()
88 rc = regmap_write(i3c->global_regs, in ast2600_i3c_init()
89 AST2600_I3CG_REG0(i3c->global_idx), reg); in ast2600_i3c_init()
96 reg = AST2600_I3CG_REG1_INST_ID(i3c->global_idx); in ast2600_i3c_init()
97 rc = regmap_write(i3c->global_regs, in ast2600_i3c_init()
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/linux/Documentation/ABI/testing/
H A Dsysfs-bus-i3c1 What: /sys/bus/i3c/devices/i3c-<bus-id>
3 Contact: linux-i3c@vger.kernel.org
5 An I3C bus. This directory will contain one sub-directory per
6 I3C device present on the bus.
8 What: /sys/bus/i3c/devices/i3c-<bus-id>/current_master
10 Contact: linux-i3c@vger.kernel.org
12 Expose the master that owns the bus (<bus-id>-<master-pid>) at
17 What: /sys/bus/i3c/devices/i3c-<bus-id>/mode
19 Contact: linux-i3c@vger.kernel.org
21 I3C bus mode. Can be "pure", "mixed-fast" or "mixed-slow". See
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/linux/Documentation/driver-api/i3c/
H A Dprotocol.rst1 .. SPDX-License-Identifier: GPL-2.0
4 I3C protocol
12 collisions are prevented, ...) please have a look at the I3C specification.
14 This document is just a brief introduction to the I3C protocol and the concepts
16 I3C specification (can be downloaded here
17 https://resources.mipi.org/mipi-i3c-v1-download).
22 The I3C (pronounced 'eye-three-see') is a MIPI standardized protocol designed
25 while remaining power-efficient.
27 I3C Bus
30 An I3C bus is made of several I3C devices and possibly some I2C devices as
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H A Dmaster-driver-api.rst1 .. SPDX-License-Identifier: GPL-2.0
4 I3C master controller driver API
7 .. kernel-doc:: drivers/i3c/master.c
9 .. kernel-doc:: include/linux/i3c/master.h
H A Dindex.rst1 .. SPDX-License-Identifier: GPL-2.0
4 I3C subsystem
10 device-driver-api
11 master-driver-api
/linux/Documentation/devicetree/bindings/i3c/
H A Dsilvaco,i3c-master.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i3c/silvaco,i3c-master.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Silvaco I3C master
10 - Conor Culhane <conor.culhane@silvaco.com>
15 - enum:
16 - nuvoton,npcm845-i3c
17 - silvaco,i3c-master-v1
18 - items:
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H A Dcdns,i3c-master.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i3c/cdns,i3c-master.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence I3C master block
10 - Boris Brezillon <bbrezillon@kernel.org>
13 - $ref: i3c.yaml#
17 const: cdns,i3c-master
25 clock-names:
27 - const: pclk
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H A Di3c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i3c/i3c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: I3C bus
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
11 - Miquel Raynal <miquel.raynal@bootlin.com>
14 I3C busses can be described with a node for the primary I3C controller device
15 and a set of child nodes for each I2C or I3C slave on the bus. Each of them
20 pattern: "^i3c@[0-9a-f]+$"
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/linux/drivers/net/mctp/
H A Dmctp-i3c.c1 // SPDX-License-Identifier: GPL-2.0
4 * "DSP0233 Management Component Transport Protocol (MCTP) I3C Transport
13 #include <linux/i3c/device.h>
14 #include <linux/i3c/master.h>
27 static const int MCTP_I3C_MAXMTU = MCTP_I3C_MAXBUF - 1;
42 static const char *MCTP_I3C_OF_PROP = "mctp-controller";
73 struct i3c_device *i3c; member
82 /* I3C dynamic address */
102 struct i3c_priv_xfer xfer = { .rnw = 1, .len = mi->mrl }; in mctp_i3c_read()
103 struct net_device_stats *stats = &mi->mbus->ndev->stats; in mctp_i3c_read()
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/linux/include/linux/i3c/
H A Dccc.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 #include <linux/i3c/device.h>
14 /* I3C CCC (Common Command Codes) related definitions */
30 /* Broadcast-only commands */
36 /* Unicast-only commands */
56 * struct i3c_ccc_events - payload passed to ENEC/DISEC CCC
69 * struct i3c_ccc_mwl - payload passed to SETMWL/GETMWL CCC
81 * struct i3c_ccc_mrl - payload passed to SETMRL/GETMRL CCC
88 * The IBI length is only valid if the I3C slave is IBI capable
97 * struct i3c_ccc_dev_desc - I3C/I2C device descriptor used for DEFSLVS
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/linux/drivers/i3c/master/mipi-i3c-hci/
H A Dxfer_mode_rate.h1 /* SPDX-License-Identifier: BSD-3-Clause */
9 * This applies starting from I3C HCI v2.0.
16 * Master Transfer Mode Table Fixed Indexes.
22 #define XFERMODE_IDX_I3C_SDR 0x00 /* I3C SDR Mode */
23 #define XFERMODE_IDX_I3C_HDR_DDR 0x01 /* I3C HDR-DDR Mode */
24 #define XFERMODE_IDX_I3C_HDR_T 0x02 /* I3C HDR-Ternary Mode */
25 #define XFERMODE_IDX_I3C_HDR_BT 0x03 /* I3C HDR-BT Mode */
38 * Master Data Transfer Rate Selector Values.
67 * Master Data Transfer Rate Table Mode ID values.
73 * Master Data Transfer Rate Table Entry Bits Definitions
H A Dcmd_v2.c1 // SPDX-License-Identifier: BSD-3-Clause
7 * I3C HCI v2.0 Command Descriptor Handling
9 * Note: The I3C HCI v2.0 spec is still in flux. The code here will change.
13 #include <linux/i3c/master.h>
68 struct i3c_bus *bus = i3c_master_get_bus(&hci->master); in get_i3c_rate_idx()
70 if (bus->scl_rate.i3c >= 12000000) in get_i3c_rate_idx()
72 if (bus->scl_rate.i3c > 8000000) in get_i3c_rate_idx()
74 if (bus->scl_rate.i3c > 6000000) in get_i3c_rate_idx()
76 if (bus->scl_rate.i3c > 4000000) in get_i3c_rate_idx()
78 if (bus->scl_rate.i3c > 2000000) in get_i3c_rate_idx()
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H A Dcmd_v1.c1 // SPDX-License-Identifier: BSD-3-Clause
7 * I3C HCI v1.0/v1.1 Command Descriptor Handling
11 #include <linux/i3c/master.h>
124 struct i3c_bus *bus = i3c_master_get_bus(&hci->master); in get_i3c_mode()
126 if (bus->scl_rate.i3c > 8000000) in get_i3c_mode()
128 if (bus->scl_rate.i3c > 6000000) in get_i3c_mode()
130 if (bus->scl_rate.i3c > 4000000) in get_i3c_mode()
132 if (bus->scl_rate.i3c > 2000000) in get_i3c_mode()
139 struct i3c_bus *bus = i3c_master_get_bus(&hci->master); in get_i2c_mode()
141 if (bus->scl_rate.i2c >= 1000000) in get_i2c_mode()
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H A Dcore.c1 // SPDX-License-Identifier: BSD-3-Clause
7 * Core driver code with main interface to the I3C subsystem.
13 #include <linux/i3c/master.h>
36 #define HC_CONTROL_HOT_JOIN_CTRL BIT(8) /* Hot-Join ACK/NACK Control */
40 #define HC_CONTROL_IBA_INCLUDE BIT(0) /* Include I3C Broadcast Address */
42 #define MASTER_DEVICE_ADDR 0x08 /* Master Device Address */
58 #define HC_CAP_NON_CURRENT_MASTER_CAP BIT(5) /* master handoff capable */
106 #define IBI_NOTIFY_MR_REJECTED BIT(1) /* Rejected Master Request Control */
107 #define IBI_NOTIFY_HJ_REJECTED BIT(0) /* Rejected Hot-Join Control */
115 return container_of(m, struct i3c_hci, master); in to_i3c_hci()
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H A Dext_caps.c1 // SPDX-License-Identifier: BSD-3-Clause
11 #include <linux/i3c/master.h>
26 hci->vendor_mipi_id = readl(base + 0x04); in hci_extcap_hardware_id()
27 hci->vendor_version_id = readl(base + 0x08); in hci_extcap_hardware_id()
28 hci->vendor_product_id = readl(base + 0x0c); in hci_extcap_hardware_id()
30 dev_info(&hci->master.dev, "vendor MIPI ID: %#x\n", hci->vendor_mipi_id); in hci_extcap_hardware_id()
31 dev_info(&hci->master.dev, "vendor version ID: %#x\n", hci->vendor_version_id); in hci_extcap_hardware_id()
32 dev_info(&hci->master.dev, "vendor product ID: %#x\n", hci->vendor_product_id); in hci_extcap_hardware_id()
35 switch (hci->vendor_mipi_id) { in hci_extcap_hardware_id()
37 hci->quirks |= HCI_QUIRK_RAW_CCC; in hci_extcap_hardware_id()
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H A Dhci_quirks.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * I3C HCI Quirks
7 * Authors: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
11 #include <linux/i3c/master.h>
H A Ddct_v1.c1 // SPDX-License-Identifier: BSD-3-Clause
10 #include <linux/i3c/master.h>
23 void __iomem *reg = hci->DCT_regs + dct_idx * 4 * 4; in i3c_hci_dct_get_val()
32 *pid = ((u64)dct_entry_data[0]) << (47 - 32 + 1) | in i3c_hci_dct_get_val()
/linux/drivers/i3c/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
3 menuconfig I3C config
4 tristate "I3C support"
7 I3C is a serial protocol standardized by the MIPI alliance.
13 The I3C protocol also standardizes the slave device types and is
16 If you want I3C support, you should say Y here and also to the
19 This I3C support can also be built as a module. If so, the module
20 will be called i3c.
22 if I3C
23 source "drivers/i3c/master/Kconfig"
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 i3c-y := device.o master.o
3 obj-$(CONFIG_I3C) += i3c.o
4 obj-$(CONFIG_I3C) += master/
H A Dinternals.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 #include <linux/i3c/master.h>
/linux/drivers/base/regmap/
H A Dregmap-i3c.c1 // SPDX-License-Identifier: GPL-2.0
5 #include <linux/i3c/device.h>
6 #include <linux/i3c/master.h>
12 struct i3c_device *i3c = dev_to_i3cdev(dev); in regmap_i3c_write() local
21 return i3c_device_do_priv_xfers(i3c, xfers, 1); in regmap_i3c_write()
29 struct i3c_device *i3c = dev_to_i3cdev(dev); in regmap_i3c_read() local
40 return i3c_device_do_priv_xfers(i3c, xfers, 2); in regmap_i3c_read()
48 struct regmap *__devm_regmap_init_i3c(struct i3c_device *i3c, in __devm_regmap_init_i3c() argument
53 return __devm_regmap_init(&i3c->dev, &regmap_i3c, &i3c->dev, config, in __devm_regmap_init_i3c()
59 MODULE_DESCRIPTION("regmap I3C Module");
/linux/arch/arm64/boot/dts/intel/
H A Dsocfpga_agilex5.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/clock/intel,agilex5-clkmgr.h>
14 compatible = "intel,socfpga-agilex5";
15 #address-cells = <2>;
16 #size-cells = <2>;
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