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/freebsd/sys/contrib/device-tree/src/arm64/axiado/
H A Dax3000.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2021-25 Axiado Corporation (or its affiliates). All rights reserved.
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 /memreserve/ 0x3c0013a0 0x00000008; /* cpu-release-addr */
14 interrupt-parent = <&gic500>;
15 #address-cells = <2>;
16 #size-cells = <2>;
19 #address-cells = <2>;
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/freebsd/sys/contrib/device-tree/Bindings/i3c/
H A Dcdns,i3c-master.txt1 Bindings for cadence I3C master block
5 --------------------
6 - compatible: shall be "cdns,i3c-master"
7 - clocks: shall reference the pclk and sysclk
8 - clock-names: shall contain "pclk" and "sysclk"
9 - interrupts: the interrupt line connected to this I3C master
10 - reg: I3C master registers
13 Documentation/devicetree/bindings/i3c/i3c.yaml for more details):
15 - #address-cells: shall be set to 1
16 - #size-cells: shall be set to 0
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H A Dsnps,dw-i3c-master.txt1 Bindings for Synopsys DesignWare I3C master block
5 --------------------
6 - compatible: shall be "snps,dw-i3c-master-1.00a"
7 - clocks: shall reference the core_clk
8 - interrupts: the interrupt line connected to this I3C master
9 - reg: Offset and length of I3C master registers
12 Documentation/devicetree/bindings/i3c/i3c.yaml for more details):
14 - #address-cells: shall be set to 3
15 - #size-cells: shall be set to 0
18 Documentation/devicetree/bindings/i3c/i3c.yaml for more details):
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H A Dsilvaco,i3c-master.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i3c/silvaco,i3c-master.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Silvaco I3C master
10 - Conor Culhane <conor.culhane@silvaco.com>
15 - enum:
16 - nuvoton,npcm845-i3c
17 - silvaco,i3c-master-v1
18 - items:
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H A Di3c.txt1 Generic device tree bindings for I3C busses
4 This document describes generic bindings that should be used to describe I3C
8 -------------------
10 - #address-cells - should be <3>. Read more about addresses below.
11 - #size-cells - should be <0>.
12 - compatible - name of the I3C master controller driving the I3C bus
16 The node describing an I3C bus should be named i3c-master.
19 -------------------
21 These properties may not be supported by all I3C master drivers. Each I3C
22 master bindings should specify which of them are supported.
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H A Dcdns,i3c-master.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i3c/cdns,i3c-master.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence I3C master block
10 - Boris Brezillon <bbrezillon@kernel.org>
13 - $ref: i3c.yaml#
18 - const: cdns,i3c-master
19 - items:
20 - enum:
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H A Dsnps,dw-i3c-master.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i3c/snps,dw-i3c-master.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare I3C master block
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
13 - $ref: i3c.yaml#
17 const: snps,dw-i3c-master-1.00a
25 - description: Core clock
26 - description: APB clock
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H A Di3c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i3c/i3c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: I3C bus
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
11 - Miquel Raynal <miquel.raynal@bootlin.com>
14 I3C busses can be described with a node for the primary I3C controller device
15 and a set of child nodes for each I2C or I3C slave on the bus. Each of them
20 pattern: "^i3c@[0-9a-f]+$"
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/freebsd/sys/contrib/device-tree/src/arm64/intel/
H A Dsocfpga_agilex5.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/clock/intel,agilex5-clkmgr.h>
14 compatible = "intel,socfpga-agilex5";
15 #address-cells = <2>;
16 #size-cells = <2>;
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/freebsd/sys/contrib/device-tree/Bindings/soc/qcom/
H A Dqcom,geni-se.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,geni-se.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
15 like UART, SPI, I2C, I3C, etc. A single QUP module can provide upto 8 Serial
23 - qcom,geni-se-qup
24 - qcom,geni-se-i2c-master-hub
30 clock-names:
38 "#address-cells":
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H A Dqcom,sa8255p-geni-se-qup.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,sa8255p-geni-se-qup.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Praveen Talari <quic_ptalari@quicinc.com>
15 like UART, SPI, I2C, I3C, etc. A single QUP module can provide up to 8 Serial
22 const: qcom,sa8255p-geni-se-qup
28 "#address-cells":
31 "#size-cells":
39 dma-coherent: true
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/freebsd/sys/contrib/device-tree/src/arm/aspeed/
H A Daspeed-bmc-facebook-harma.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
11 compatible = "facebook,harma-bmc", "aspeed,ast2600";
32 stdout-path = &uart5;
40 iio-hwmon {
41 compatible = "iio-hwmon";
42 io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
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/freebsd/sys/contrib/device-tree/src/arm64/xilinx/
H A Dversal-net.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 * (C) Copyright 2022 - 2025, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 compatible = "xlnx,versal-net";
16 #address-cells = <2>;
17 #size-cells = <2>;
18 interrupt-parent = <&gic>;
21 u-boot {
22 compatible = "u-boot,config";
23 bootscr-address = /bits/ 64 <0x20000000>;
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx94.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2024-2025 NXP
6 #include <dt-bindings/dma/fsl-edma.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include "imx94-clock.h"
12 #include "imx94-pinfunc.h"
13 #include "imx94-power.h"
16 #address-cells = <2>;
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H A Dimx93.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx93-clock.h>
7 #include <dt-bindings/dma/fsl-edma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/fsl,imx93-power.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx93-pinfunc.h"
17 interrupt-parent = <&gic>;
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H A Dimx95-15x15-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/i3c/i3c.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/phy/phy-imx8-pcie.h>
11 #include <dt-bindings/pwm/pwm.h>
12 #include <dt-bindings/usb/pd.h>
25 compatible = "fsl,imx95-15x15-evk", "fsl,imx95";
34 bt_sco_codec: bt-sco-codec {
35 compatible = "linux,bt-sco";
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H A Dimx95.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
6 #include <dt-bindings/clock/nxp,imx95-clock.h>
7 #include <dt-bindings/dma/fsl-edma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/thermal/thermal.h>
13 #include "imx95-clock.h"
14 #include "imx95-pinfunc.h"
15 #include "imx95-power.h"
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/freebsd/share/misc/
H A Dusb_vendors6 # http://www.linux-usb.org/usb-ids.html
7 # or send entries as patches (diff -u old new) in the
10 # http://www.linux-usb.org/usb.ids
13 # Date: 2025-09-15 20:34:02
20 # device device_name <-- single tab
21 # interface interface_name <-- two tabs
38 5301 GW-US54ZGL 802.11bg
54 145f NW-3100 802.11b/g 54Mbps Wireless Network Adapter [zd1211]
64 0200 TP-Link
86 120e ASI120MC-S Planetary Camera
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