Searched +full:i2s +full:- +full:regs (Results 1 – 8 of 8) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/sound/ |
H A D | intel,keembay-i2s.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/sound/intel,keembay-i2s.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Intel KeemBay I2S 11 - Daniele Alessandrelli <daniele.alessandrelli@intel.com> 12 - Paul J. Murphy <paul.j.murphy@intel.com> 15 Intel KeemBay I2S 18 - $ref: dai-common.yaml# 23 - intel,keembay-i2s [all …]
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H A D | st,sti-asoc-card.txt | 3 The sti ASoC Sound Card can be used, for all sti SoCs using internal sti-sas 8 Documentation/devicetree/bindings/sound/simple-card.yaml. 10 1) sti-uniperiph-dai: audio dai device. 11 --------------------------------------- 14 - compatible: "st,stih407-uni-player-hdmi", "st,stih407-uni-player-pcm-out", 15 "st,stih407-uni-player-dac", "st,stih407-uni-player-spdif", 16 "st,stih407-uni-reader-pcm_in", "st,stih407-uni-reader-hdmi", 18 - st,syscfg: phandle to boot-device system configuration registers 20 - clock-names: name of the clocks listed in clocks property in the same order 22 - reg: CPU DAI IP Base address and size entries, listed in same [all …]
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/freebsd/sys/contrib/device-tree/src/arm/marvell/ |
H A D | armada-388-db.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * (DB-88F6820) 8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 11 /dts-v1/; 12 #include "armada-388.dtsi" 16 compatible = "marvell,a385-db", "marvell,armada388", 20 stdout-path = "serial0:115200n8"; 35 internal-regs { 38 clock-frequency = <100000>; 39 audio_codec: audio-codec@4a { [all …]
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H A D | armada-370-db.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * (DB-88F6710-BP-DDR3) 9 * Gregory CLEMENT <gregory.clement@free-electrons.com> 10 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 15 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier 22 /dts-v1/; 23 #include "armada-370.dtsi" 27 compatible = "marvell,a370-db", "marvell,armada370", "marvell,armada-370-xp"; 30 stdout-path = "serial0:115200n8"; 43 internal-regs { [all …]
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H A D | armada-370.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 * Gregory CLEMENT <gregory.clement@free-electrons.com> 9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 15 #include "armada-370-xp.dtsi" 18 #address-cells = <1>; 19 #size-cells = <1>; 22 compatible = "marvell,armada370", "marvell,armada-370-xp"; 31 compatible = "marvell,armada370-mbus", "simple-bus"; 39 compatible = "marvell,armada-370-pcie"; 43 #address-cells = <3>; [all …]
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H A D | armada-385-turris-omnia.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 * Copyright (C) 2016 Uwe Kleine-König <uwe@kleine-koenig.org> 8 * Schematic available at https://www.turris.cz/doc/_media/rtrom01-schema.pdf 11 /dts-v1/; 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/input/input.h> 15 #include <dt-bindings/leds/common.h> 16 #include "armada-385.dtsi" 20 compatible = "cznic,turris-omnia", "marvell,armada385", "marvell,armada380"; 23 stdout-path = &uart0; [all …]
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H A D | armada-38x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 * Gregory CLEMENT <gregory.clement@free-electrons.com> 9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 18 #address-cells = <1>; 19 #size-cells = <1>; 32 compatible = "arm,cortex-a9-pmu"; 33 interrupts-extended = <&mpic 3>; 37 compatible = "marvell,armada380-mbus", "simple-bus"; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/display/rockchip/ |
H A D | cdn-dp-rockchip.txt | 5 - compatible: must be "rockchip,rk3399-cdn-dp" 7 - reg: physical base address of the controller and length 9 - clocks: from common clock binding: handle to dp clock. 11 - clock-names: from common clock binding: 12 Required elements: "core-clk" "pclk" "spdif" "grf" 14 - resets : a list of phandle + reset specifier pairs 15 - reset-names : string of reset names 17 - power-domains : power-domain property defined with a phandle 19 - assigned-clocks: main clock, should be <&cru SCLK_DP_CORE> 20 - assigned-clock-rates : the DP core clk frequency, shall be: 100000000 [all …]
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