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/linux/Documentation/devicetree/bindings/display/bridge/
H A Dgoogle,cros-ec-anx7688.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/google,cros-ec-anx7688.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ChromeOS EC ANX7688 HDMI to DP Converter through Type-C Port
10 - Nicolas Boichat <drinkcat@chromium.org>
14 DisplayPort 1.3 Ultra-HDi (4096x2160p60). It is an Analogix ANX7688 chip
16 (See google,cros-ec.yaml). It is accessed using I2C tunneling through
17 the EC and therefore its node should be a child of an EC I2C tunnel node
18 (See google,cros-ec-i2c-tunnel.yaml).
[all …]
/linux/Documentation/devicetree/bindings/media/i2c/
H A Dmaxim,max96717.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/i2c/maxim,max96717.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MAX96717 CSI-2 to GMSL2 Serializer
11 - Julien Massot <julien.massot@collabora.com>
14 The MAX96717 serializer converts MIPI CSI-2 D-PHY formatted input
16 simultaneously transmit bidirectional control-channel data while forward
18 remotely located deserializer using industry-standard coax or STP
19 interconnects. The device cans operate in pixel or tunnel mode. In pixel mode
[all …]
H A Dmaxim,max96714.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/i2c/maxim,max96714.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Maxim MAX96714 GMSL2 to CSI-2 Deserializer
11 - Julien Massot <julien.massot@collabora.com>
15 CSI-2 D-PHY formatted output. The device allows the GMSL2 link to
16 simultaneously transmit bidirectional control-channel data while forward
18 remotely located serializer using industry-standard coax or STP
19 interconnects. The device cans operate in pixel or tunnel mode. In pixel mode
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsc7280-idp-ec-h1.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
11 pinctrl-0 = <&qup_spi10_data_clk>, <&qup_spi10_cs_gpio_init_high>, <&qup_spi10_cs_gpio>;
12 cs-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
15 compatible = "google,cros-ec-spi";
17 interrupt-parent = <&tlmm>;
19 pinctrl-names = "default";
20 pinctrl-0 = <&ap_ec_int_l>;
21 spi-max-frequency = <3000000>;
22 wakeup-source;
25 compatible = "google,cros-ec-pwm";
[all …]
H A Dsc7280-herobrine.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
16 #include <dt-bindings/input/gpio-keys.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/leds/common.h>
20 #include "sc7280-qcard.dtsi"
21 #include "sc7280-chrome-common.dtsi"
25 stdout-path = "serial0:115200n8";
38 ppvar_sys: ppvar-sys-regulator {
39 compatible = "regulator-fixed";
40 regulator-name = "ppvar_sys";
[all …]
H A Dsc7180-trogdor.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/gpio-keys.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include <dt-bindings/sound/sc7180-lpass.h>
16 #include "sc7180-firmware-tfa.dtsi"
22 thermal-zones {
23 charger_thermal: charger-thermal {
[all …]
/linux/Documentation/netlink/specs/
H A Dethtool.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
5 protocol: genetlink-legacy
8 uapi-header: linux/ethtool_netlink_generated.h
11 -
12 name: udp-tunnel-type
13 enum-name:
15 entries: [ vxlan, geneve, vxlan-gpe ]
16 enum-cnt-name: __ethtool-udp-tunnel-type-cnt
17 render-max: true
18 -
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/linux/drivers/i2c/busses/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for the i2c bus drivers.
7 obj-$(CONFIG_I2C_SCMI) += i2c-scmi.o
9 # Auxiliary I2C/SMBus modules
10 obj-$(CONFIG_I2C_CCGX_UCSI) += i2c-ccgx-ucsi.o
13 obj-$(CONFIG_I2C_ALI1535) += i2c-ali1535.o
14 obj-$(CONFIG_I2C_ALI1563) += i2c-ali1563.o
15 obj-$(CONFIG_I2C_ALI15X3) += i2c-ali15x3.o
16 obj-$(CONFIG_I2C_AMD756) += i2c-amd756.o
17 obj-$(CONFIG_I2C_AMD8111) += i2c-amd8111.o
[all …]
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 menu "I2C Hardware Bus support"
16 for Cypress CCGx Type-C controller. Individual bus drivers
25 controller is part of the 7101 device, which is an ACPI-compliant
29 will be called i2c-ali1535.
37 controller is part of the 7101 device, which is an ACPI-compliant
41 will be called i2c-ali1563.
48 Acer Labs Inc. (ALI) M1514 and M1543 motherboard I2C interfaces.
51 will be called i2c-ali15x3.
58 756/766/768 mainboard I2C interfaces. The driver also includes
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-gru.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2016-2017 Google, Inc
8 #include <dt-bindings/input/input.h>
9 #include "rk3399-op1.dtsi"
18 stdout-path = "serial2:115200n8";
27 * - Rails that only connect to the EC (or devices that the EC talks to)
29 * - Rails _are_ included if the rails go to the AP even if the AP
38 * - The EC controls the enable and the EC always enables a rail as
40 * - The rails are actually connected to each other by a jumper and
45 ppvar_sys: regulator-ppvar-sys {
[all …]
/linux/drivers/media/i2c/
H A Dmax96717.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/clk-provider.h>
14 #include <linux/i2c-mux.h>
15 #include <linux/i2c.h>
18 #include <media/v4l2-cci.h>
19 #include <media/v4l2-ctrls.h>
20 #include <media/v4l2-fwnode.h>
21 #include <media/v4l2-subdev.h>
154 priv->mux = i2c_mux_alloc(priv->client->adapter, &priv->client->dev, in max96717_i2c_mux_init()
157 if (!priv->mux) in max96717_i2c_mux_init()
[all …]
H A Dmax96714.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/i2c.h>
13 #include <linux/i2c-mux.h>
18 #include <media/v4l2-cci.h>
19 #include <media/v4l2-ctrls.h>
20 #include <media/v4l2-fwnode.h>
21 #include <media/v4l2-subdev.h>
126 return cci_update_bits(priv->regmap, MAX96714_MIPI_STDBY_N, in max96714_enable_tx_port()
133 return cci_update_bits(priv->regmap, MAX96714_MIPI_STDBY_N, in max96714_disable_tx_port()
141 cci_read(priv->regmap, MAX96714_MIPI_STDBY_N, &val, NULL); in max96714_tx_port_enabled()
[all …]
/linux/drivers/clk/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
50 This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs
59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
79 depends on I2C
88 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
98 multi-function device has one fixed-rate oscillator, clocked
123 depends on I2C
129 be pre-programmed to support other configurations and features not yet
134 depends on I2C
142 depends on I2C
[all …]
/linux/arch/arm/boot/dts/samsung/
H A Dexynos5420-peach-pit.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos5420-cpus.dtsi"
21 compatible = "google,pit-rev16",
[all …]
H A Dexynos5800-peach-pi.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos5420-cpus.dtsi"
21 compatible = "google,pi-rev16",
[all …]
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra124-venice2.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
12 rtc0 = "/i2c@7000d000/pmic@40";
18 stdout-path = "serial0:115200n8";
29 vdd-supply = <&vdd_3v3_hdmi>;
30 pll-supply = <&vdd_hdmi_pll>;
31 hdmi-supply = <&vdd_5v0_hdmi>;
33 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
34 nvidia,hpd-gpio =
[all …]
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra132-norrin.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
18 stdout-path = "serial0:115200n8";
30 vdd-supply = <&vdd_3v3_hdmi>;
31 pll-supply = <&vdd_hdmi_pll>;
32 hdmi-supply = <&vdd_5v0_hdmi>;
34 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
35 nvidia,hpd-gpio =
42 avdd-io-hdmi-dp-supply = <&vdd_3v3_hdmi>;
[all …]
/linux/drivers/gpio/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
47 this symbol, but new drivers should use the generic gpio-regmap
57 non-sleeping contexts. They can make bitbanged serial protocols
116 # This symbol is selected by both I2C and SPI expanders
126 Enables support for the idio-16 library functions. The idio-16 library
128 ACCES IDIO-16 family such as the 104-IDIO-16 and the PCI-IDIO-16.
130 If built as a module its name will be gpio-idio-16.
136 tristate "GPIO driver for 74xx-ICs with MMIO access"
140 Say yes here to support GPIO functionality for 74xx-compatible ICs
155 If driver is built as a module it will be called gpio-altera.
[all …]
/linux/drivers/power/supply/
H A Dsbs-battery.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 #include <linux/devm-helpers.h>
13 #include <linux/i2c.h>
20 #include <linux/power/sbs-battery.h>
103 SBS_DATA(-1, 0x03, 0, 65535),
109 SBS_DATA(POWER_SUPPLY_PROP_CURRENT_NOW, 0x0A, -3276
[all...]
/linux/drivers/gpu/drm/display/
H A Ddrm_dp_helper.c27 #include <linux/i2c.h>
77 return link_status[r - DP_LANE0_1_STATUS]; in dp_link_status()
231 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_clock_recovery_delay_us()
232 aux->name, rd_interval); in __8b10b_clock_recovery_delay_us()
243 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_channel_eq_delay_us()
244 aux->name, rd_interval); in __8b10b_channel_eq_delay_us()
256 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x\n", in __128b132b_channel_eq_delay_us()
257 aux->name, rd_interval); in __128b132b_channel_eq_delay_us()
279 * - Clock recovery vs. channel equalization
280 * - DPRX vs. LTTPR
[all …]
/linux/drivers/net/ethernet/amd/xgbe/
H A Dxgbe-drv.c9 * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
59 * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
129 #include "xgbe-common.h"
176 for (i = 0; i < ARRAY_SIZE(pdata->channel); i++) { in xgbe_free_channels()
177 if (!pdata->channel[i]) in xgbe_free_channels()
180 kfree(pdata->channel[i]->rx_ring); in xgbe_free_channels()
181 kfree(pdata->channel[i]->tx_ring); in xgbe_free_channels()
182 kfree(pdata->channel[i]); in xgbe_free_channels()
184 pdata->channel[i] = NULL; in xgbe_free_channels()
187 pdata->channel_count = 0; in xgbe_free_channels()
[all …]
/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
[all …]
/linux/drivers/net/ethernet/sfc/siena/
H A Dmcdi_pcol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
38 /* The rest of these are firmware-defined */
46 /* Values to be written to the per-port status dword in shared
71 * | | \--- Response
72 * | \------- Error
73 * \------------------------------ Resync (always set)
[all …]
/linux/drivers/gpu/drm/i915/display/
H A Dintel_dp.c29 #include <linux/i2c.h>
126 * intel_dp_is_edp - is the given port attached to an eDP panel (either CPU or PCH)
138 return dig_port->base.type == INTEL_OUTPUT_EDP; in intel_dp_is_edp()
146 return drm_dp_is_uhbr_rate(crtc_state->port_clock); in intel_dp_is_uhbr()
150 * intel_dp_link_symbol_size - get the link symbol size for a given link rate
154 * rate -> channel coding.
162 * intel_dp_link_symbol_clock - convert link rate to link symbol clock
176 return drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel); in max_dprx_rate()
178 return drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]); in max_dprx_rate()
184 return drm_dp_tunnel_max_dprx_lane_count(intel_dp->tunnel); in max_dprx_lane_count()
[all …]
/linux/drivers/gpu/drm/amd/display/dmub/inc/
H A Ddmub_cmd.h143 * Physical framebuffer address location, 64-bit.
255 * @knee_threshold: Current x-position of ACE knee (u0.16).
275 * union dmub_addr - DMUB physical/virtual 64-bit address.
457 * 0x1 (bit 0) - Desync Error flag.
462 * 0x2 (bit 1) - State Transition Error flag.
467 * 0x4 (bit 2) - Crc Error flag
472 * 0x8 (bit 3) - Reserved
477 * 0x10 (bit 4) - Incorrect Coasting vtotal checking --> use debug flag to control DPCD write.
483 * 0x20 (bit 5) - No doubled Refresh Rate.
488 * Reserved bit 6-7
[all …]

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