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/linux/Documentation/devicetree/bindings/i3c/
H A Di3c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
11 - Miquel Raynal <miquel.raynal@bootlin.com>
15 and a set of child nodes for each I2C or I3C slave on the bus. Each of them
20 pattern: "^i3c@[0-9a-f]+$"
22 "#address-cells":
25 Each I2C device connected to the bus should be described in a subnode.
35 this I3C device has a static I2C address and we want to assign it a
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H A Dcdns,i3c-master.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i3c/cdns,i3c-master.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Boris Brezillon <bbrezillon@kernel.org>
13 - $ref: i3c.yaml#
17 const: cdns,i3c-master
25 clock-names:
27 - const: pclk
28 - const: sysclk
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/linux/drivers/i2c/busses/
H A Di2c-acorn.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * ARM IOC/IOMD i2c driver.
7 * On Acorn machines, the following i2c devices are on the bus:
8 * - PCF8583 real time clock & static RAM
11 #include <linux/i2c.h>
12 #include <linux/i2c-algo-bit.h>
19 #define SCL 0x02 macro
23 * We must preserve all non-i2c output bits in IOC_CONTROL.
24 * Note also that we need to preserve the value of SCL and
32 u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA); in ioc_setscl()
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H A Di2c-pxa.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * I2C adapter for the PXA I2C bus access.
8 * Copyright (C) 2004-2005 Deep Blue Solutions Ltd.
13 * Jan 2003: Fixed several bugs concerning interrupt handling [Kai-Uwe Bloem]
14 * Jan 2003: added limited signal handling [Kai-Uwe Bloem]
24 #include <linux/i2c.h>
34 #include <linux/platform_data/i2c-pxa.h>
38 /* I2C register field definitions */
59 #define ICR_A3700_FM (1 << 16) /* fast mode for armada-3700 */
60 #define ICR_A3700_HS (1 << 17) /* high speed mode for armada-3700 */
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H A Di2c-omap.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * TI OMAP I2C master mode driver
7 * Copyright (C) 2004 - 2007 Texas Instruments.
20 #include <linux/i2c.h>
29 #include <linux/platform_data/i2c-omap.h>
34 /* I2C controller revisions */
37 /* I2C controller revisions present on specific hardware */
80 /* I2C Interrupt Enable Register (OMAP_I2C_IE): */
89 /* I2C Status Register (OMAP_I2C_STAT): */
103 /* I2C WE wakeup enable register */
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H A Di2c-parport.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* ------------------------------------------------------------------------ *
3 * i2c-parport.c I2C bus over parallel port *
4 * ------------------------------------------------------------------------ *
5 Copyright (C) 2003-2011 Jean Delvare <jdelvare@suse.de>
7 Based on older i2c-philips-par.c driver
8 Copyright (C) 1995-2000 Simon G. Vogl
13 * ------------------------------------------------------------------------ */
15 #define pr_fmt(fmt) "i2c-parport: " fmt
22 #include <linux/i2c.h>
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H A Di2c-designware-common.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Synopsys DesignWare I2C adapter driver.
5 * Based on the TI DAVINCI I2C adapter driver.
21 #include <linux/i2c.h>
35 #include "i2c-designware-core.h"
65 "incorrect slave-transmitter mode configuration",
72 *val = readl(dev->base + reg); in dw_reg_read()
81 writel(val, dev->base + reg); in dw_reg_write()
90 *val = swab32(readl(dev->base + reg)); in dw_reg_read_swab()
99 writel(swab32(val), dev->base + reg); in dw_reg_write_swab()
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/linux/Documentation/devicetree/bindings/i2c/
H A Dst,stm32-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/st,stm32-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: I2C controller embedded in STMicroelectronics STM32 I2C platform
10 - Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
19 - st,stm32f7-i2c
20 - st,stm32mp13-i2c
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H A Di2c-rk3x.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-rk3x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip RK3xxx I2C controller
10 This driver interfaces with the native I2C controller present in Rockchip
14 - $ref: /schemas/i2c/i2c-controller.yaml#
17 - Heiko Stuebner <heiko@sntech.de>
23 - const: rockchip,rv1108-i2c
24 - const: rockchip,rk3066-i2c
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H A Drenesas,rcar-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/renesas,rcar-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car I2C Controller
10 - Wolfram Sang <wsa+renesas@sang-engineering.com>
15 - items:
16 - enum:
17 - renesas,i2c-r8a7778 # R-Car M1A
18 - renesas,i2c-r8a7779 # R-Car H1
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H A Dsnps,designware-i2c.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/snps,designware-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare APB I2C Controller
10 - Jarkko Nikula <jarkko.nikula@linux.intel.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
19 const: mscc,ocelot-i2c
28 - description: Generic Synopsys DesignWare I2C controller
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H A Di2c-mt65xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mt65xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek I2C controller
10 This driver interfaces with the native I2C controller present in
14 - $ref: /schemas/i2c/i2c-controller.yaml#
17 - Qii Wang <qii.wang@mediatek.com>
22 - const: mediatek,mt2712-i2c
23 - const: mediatek,mt6577-i2c
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H A Dsamsung,s3c2410-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/samsung,s3c2410-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S3C/S5P/Exynos SoC I2C Controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 - enum:
16 - samsung,s3c2410-i2c
17 - samsung,s3c2440-i2c
18 # For s3c2440-like I2C used inside HDMIPHY block found on several SoCs:
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/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-gru-chromebook.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-Chromebook shared properties
8 #include "rk3399-gru.dtsi"
11 pp900_ap: regulator-pp900-ap {
12 compatible = "regulator-fixed";
13 regulator-name = "pp900_ap";
16 regulator-always-on;
17 regulator-boot-on;
18 regulator-min-microvolt = <900000>;
19 regulator-max-microvolt = <900000>;
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H A Drk3399-gru.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2016-2017 Google, Inc
8 #include <dt-bindings/input/input.h>
9 #include "rk3399-op1.dtsi"
18 stdout-path = "serial2:115200n8";
27 * - Rails that only connect to the EC (or devices that the EC talks to)
29 * - Rails _are_ included if the rails go to the AP even if the AP
38 * - The EC controls the enable and the EC always enables a rail as
40 * - The rails are actually connected to each other by a jumper and
45 ppvar_sys: regulator-ppvar-sys {
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/linux/drivers/media/pci/ivtv/
H A Divtv-i2c.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 I2C functions
4 Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com>
5 Copyright (C) 2005-2007 Hans Verkuil <hverkuil@xs4all.nl>
10 This file includes an i2c implementation that was reverse engineered
11 from the Hauppauge windows driver. Older ivtv versions used i2c-algo-bit,
13 CPU on the PVR-150 which handles IR functions (occasional inability to
14 communicate with the chip until it was reset) and also with the i2c
17 The implementation is very similar to i2c-algo-bit, but there are enough
19 employed by i2c-algo-bit is to use udelay() to implement the timing
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/linux/drivers/iio/temperature/
H A Dmlx90614.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * mlx90614.c - Support for Melexis MLX90614/MLX90615 contactless IR temperature sensor
9 * Driver for the Melexis MLX90614/MLX90615 I2C 16-bit IR thermopile sensor
11 * MLX90614 - 17-bit ADC + MLX90302 DSP
12 * MLX90615 - 16-bit ADC + MLX90325 DSP
14 * (7-bit I2C slave address 0x5a, 100KHz bus speed only!)
16 * To wake up from sleep mode, the SDA line must be held low while SCL is high
19 * will not interfere in I2C communication. While the GPIO is driven low, the
20 * i2c adapter is locked since it cannot be used by other clients. The SCL line
21 * always has a pull-up so we do not need an extra GPIO to drive it high. If
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/linux/drivers/net/can/sja1000/
H A Dpeak_pci.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2012 Stephane Grosjean <s.grosjean@peak-system.com>
8 * Copyright (C) 2001-2006 PEAK System-Technik GmbH
18 #include <linux/i2c.h>
19 #include <linux/i2c-algo-bit.h>
25 MODULE_AUTHOR("Stephane Grosjean <s.grosjean@peak-system.com>");
26 MODULE_DESCRIPTION("Socket-CAN driver for PEAK PCAN PCI family cards");
62 #define PEAK_PC_104P_DEVICE_ID 0x0006 /* PCAN-PC/104+ cards */
63 #define PEAK_PCI_104E_DEVICE_ID 0x0007 /* PCAN-PCI/104 Express cards */
65 #define PEAK_PCIE_OEM_ID 0x0009 /* PCAN-PCI Express OEM */
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/linux/arch/arm64/boot/dts/qcom/
H A Dx1e80100.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
8 #include <dt-bindings/clock/qcom,x1e80100-dispcc.h>
9 #include <dt-bindings/clock/qcom,x1e80100-gcc.h>
10 #include <dt-bindings/clock/qcom,x1e80100-gpucc.h>
11 #include <dt-bindings/clock/qcom,x1e80100-tcsr.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/interconnect/qcom,icc.h>
14 #include <dt-bindings/interconnect/qcom,x1e80100-rpmh.h>
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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mm-data-modul-edm-sbc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/net/qca-ar803x.h>
9 #include <dt-bindings/phy/phy-imx8-pcie.h>
14 compatible = "dmo,imx8mm-data-modul-edm-sbc", "fsl,imx8mm";
22 stdout-path = &uart3;
32 compatible = "pwm-backlight";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pinctrl_panel_backlight>;
35 brightness-levels = <0 1 10 20 30 40 50 60 70 75 80 90 100>;
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/linux/Documentation/ABI/testing/
H A Dsysfs-bus-i3c1 What: /sys/bus/i3c/devices/i3c-<bus-id>
3 Contact: linux-i3c@vger.kernel.org
5 An I3C bus. This directory will contain one sub-directory per
8 What: /sys/bus/i3c/devices/i3c-<bus-id>/current_master
10 Contact: linux-i3c@vger.kernel.org
12 Expose the master that owns the bus (<bus-id>-<master-pid>) at
17 What: /sys/bus/i3c/devices/i3c-<bus-id>/mode
19 Contact: linux-i3c@vger.kernel.org
21 I3C bus mode. Can be "pure", "mixed-fast" or "mixed-slow". See
25 What: /sys/bus/i3c/devices/i3c-<bus-id>/i3c_scl_frequency
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/linux/drivers/i2c/algos/
H A Di2c-algo-pca.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters
14 #include <linux/i2c.h>
15 #include <linux/i2c-algo-pca.h>
26 #define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val)
27 #define pca_inw(adap, reg) adap->read_byte(adap->data, reg)
30 #define pca_clock(adap) adap->i2c_clock
33 #define pca_wait(adap) adap->wait_for_completion(adap->data)
37 if (adap->chip == I2C_PCA_CHIP_9665) { in pca_reset()
46 * After a reset we need to re-apply any configuration in pca_reset()
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/linux/drivers/video/fbdev/i810/
H A Di810-i2c.c1 /*-*- linux-c -*-
2 * linux/drivers/video/i810-i2c.c -- Intel 810/815 I2C support
45 struct i810fb_par *par = chan->par; in i810i2c_setscl()
46 u8 __iomem *mmio = par->mmio_start_virtual; in i810i2c_setscl()
49 i810_writel(mmio, chan->ddc_base, SCL_DIR_MASK | SCL_VAL_MASK); in i810i2c_setscl()
51 i810_writel(mmio, chan->ddc_base, SCL_DIR | SCL_DIR_MASK | SCL_VAL_MASK); in i810i2c_setscl()
52 i810_readl(mmio, chan->ddc_base); /* flush posted write */ in i810i2c_setscl()
58 struct i810fb_par *par = chan->par; in i810i2c_setsda()
59 u8 __iomem *mmio = par->mmio_start_virtual; in i810i2c_setsda()
62 i810_writel(mmio, chan->ddc_base, SDA_DIR_MASK | SDA_VAL_MASK); in i810i2c_setsda()
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/linux/drivers/i2c/
H A Di2c-core-base.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Linux I2C core
5 * Copyright (C) 1995-99 Simon G. Vogl
10 * Copyright (C) 2013-2017 Wolfram Sang <wsa@kernel.org>
13 #define pr_fmt(fmt) "i2c-core: " fmt
15 #include <dt-bindings/i2c/i2c.h>
17 #include <linux/clk/clk-conf.h>
24 #include <linux/i2c.h>
25 #include <linux/i2c-smbus.h>
46 #include "i2c-core.h"
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/linux/arch/arm/boot/dts/intel/ixp/
H A Dintel-ixp42x-linksys-nslu2.dts1 // SPDX-License-Identifier: ISC
6 /dts-v1/;
8 #include "intel-ixp42x.dtsi"
9 #include <dt-bindings/input/input.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
25 stdout-path = "uart0:115200n8";
33 compatible = "gpio-leds";
34 led-status {
37 default-state = "on";
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