/freebsd/sys/contrib/device-tree/Bindings/i2c/ |
H A D | nvidia,tegra186-bpmp-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/nvidia,tegra186-bpmp-i2c.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NVIDIA Tegra186 (and later) BPMP I2C controller 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 15 owns certain HW devices, such as the I2C controller for the power 16 management I2C bus. Software running on other CPUs must perform IPC to 17 the BPMP in order to execute transactions on that I2C bus. This [all …]
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H A D | nvidia,tegra186-bpmp-i2c.txt | 1 NVIDIA Tegra186 BPMP I2C controller 4 devices, such as the I2C controller for the power management I2C bus. Software 6 transactions on that I2C bus. This binding describes an I2C bus that is 9 The BPMP I2C node must be located directly inside the main BPMP node. See 10 ../firmware/nvidia,tegra186-bpmp.txt for details of the BPMP binding. 12 This node represents an I2C controller. See ../i2c/i2c.txt for details of the 13 core I2C binding. 16 - compatible: 19 - "nvidia,tegra186-bpmp-i2c". 20 - #address-cells: Address cells for I2C device address. [all …]
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H A D | i2c-rk3x.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/i2c/i2c-rk3x.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip RK3xxx I2C controller 10 This driver interfaces with the native I2C controller present in Rockchip 14 - $ref: /schemas/i2c/i2c-controller.yaml# 17 - Heiko Stuebner <heiko@sntech.de> 23 - const: rockchip,rv1108-i2c 24 - const: rockchip,rk3066-i2c [all …]
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H A D | nvidia,tegra20-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/nvidia,tegra20-i2c.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 - Thierry Reding <thierry.reding@gmail.com> 9 - Jon Hunter <jonathanh@nvidia.com> 11 title: NVIDIA Tegra I2C controller driver 16 - description: Tegra20 has 4 generic I2C controller. This can support 17 master and slave mode of I2C communication. The i2c-tegra driver 18 only support master mode of I2C communication. Driver of I2C [all …]
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H A D | st,stm32-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id [all...] |
H A D | i2c-pxa.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/i2c/i2c-pxa.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Marvell MMP I2C controller 10 - Rob Herring <robh+dt@kernel.org> 13 - $ref: /schemas/i2c/i2c-controller.yaml# 14 - if: 17 - mrvl,i2c-polling 20 - interrupts [all …]
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H A D | i2c-owl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/i2c-owl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Actions Semi Owl I2C Controller 10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 13 This I2C controller is found in the Actions Semi Owl SoCs: 17 - $ref: /schemas/i2c/i2c-controller.yaml# 22 - actions,s500-i2c # Actions Semi S500 compatible SoCs 23 - actions,s700-i2c # Actions Semi S700 compatible SoCs [all …]
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H A D | i2c-pxa-pci-ce4100.txt | 1 CE4100 I2C 2 ---------- 4 CE4100 has one PCI device which is described as the I2C-Controller. This 5 PCI device has three PCI-bars, each bar contains a complete I2C 6 controller. So we have a total of three independent I2C-Controllers 8 The driver is probed via the PCI-ID and is gathering the information of 10 Grant Likely recommended to use the ranges property to map the PCI-Bar 12 of the specific I2C controller. This were his exact words: 22 non-zero if you had 2 or more devices mapped off 30 ------------------------------------------------ [all …]
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H A D | brcm,iproc-i2c.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/i2c/brcm,iproc-i2c.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Broadcom iProc I2C controller 10 - Rafał Miłecki <rafal@milecki.pl> 15 - brcm,iproc-i2c 16 - brcm,iproc-nic-i2c 21 clock-frequency: 26 Should contain the I2C interrupt. For certain revisions of the I2C [all …]
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H A D | snps,designware-i2c.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/i2c/snps,designware-i2c.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Synopsys DesignWare APB I2C Controller 10 - Jarkko Nikula <jarkko.nikula@linux.intel.com> 13 - $ref: /schemas/i2c/i2c-controller.yaml# 14 - if: 19 const: mscc,ocelot-i2c 28 - description: Generic Synopsys DesignWare I2C controller [all …]
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H A D | cdns,i2c-r1p10.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/cdn [all...] |
H A D | hisilicon,ascend910-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/hisilicon,ascend910-i2c.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: HiSilicon common I2C controller 10 - Yicong Yang <yangyicong@hisilicon.com> 13 The HiSilicon common I2C controller can be used for many different 17 - $ref: /schemas/i2c/i2c-controller.yaml# 21 const: hisilicon,ascend910-i2c 32 clock-frequency: [all …]
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H A D | brcm,kona-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/brcm,kona-i2c.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Broadcom Kona family I2C controller 10 - Florian Fainelli <f.fainelli@gmail.com> 13 - $ref: /schemas/i2c/i2c-controller.yaml# 18 - enum: 19 - brcm,bcm11351-i2c 20 - brcm,bcm21664-i2c [all …]
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H A D | opencores,i2c-ocores.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/opencores,i2c-ocores.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: OpenCores I2C controller 10 - Peter Korsgaard <peter@korsgaard.com> 11 - Andrew Lunn <andrew@lunn.ch> 14 - $ref: /schemas/i2c/i2c-controller.yaml# 19 - items: 20 - enum: [all …]
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H A D | ingenic,i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/ingenic,i2c.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Ingenic SoCs I2C controller 10 - Paul Cercueil <paul@crapouillou.net> 13 - $ref: /schemas/i2c/i2c-controller.yaml# 17 pattern: "^i2c@[0-9a-f]+$" 21 - enum: 22 - ingenic,jz4770-i2c [all …]
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H A D | hpe,gxp-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/hpe,gxp-i2c.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: HPE GXP SoC I2C Controller 10 - Nick Hawkins <nick.hawkins@hpe.com> 13 - $ref: /schemas/i2c/i2c-controller.yaml# 17 const: hpe,gxp-i2c 25 clock-frequency: 32 between each I2C engine controller instance. It enables the I2C [all …]
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H A D | i2c-mt65xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/i2c-mt65xx.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MediaTek I2C controller 10 This driver interfaces with the native I2C controller present in 14 - $ref: /schemas/i2c/i2c-controller.yaml# 17 - Qii Wang <qii.wang@mediatek.com> 22 - const: mediatek,mt2712-i2c 23 - const: mediatek,mt6577-i2c [all …]
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H A D | i2c-imx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/i2c-imx.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX 10 - Oleksij Rempel <o.rempel@pengutronix.de> 13 - $ref: /schemas/i2c/i2c-controller.yaml# 18 - const: fsl,imx1-i2c 19 - const: fsl,imx21-i2c 20 - const: fsl,vf610-i2c [all …]
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H A D | nuvoton,npcm7xx-i2c.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/i2c/nuvoton,npcm7xx-i2c.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: nuvoton NPCM7XX I2C Controller 10 I2C bus controllers of the NPCM series support both master and 11 slave mode. Each controller can switch between master and slave at run time 15 - Tali Perry <tali.perry1@gmail.com> 20 - nuvoton,npcm750-i2c 21 - nuvoton,npcm845-i2c [all …]
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H A D | loongson,ls2x-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/loongson,ls2x-i2c.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson LS2X I2C Controller 10 - Binbin Zhou <zhoubinbin@loongson.cn> 13 - $ref: /schemas/i2c/i2c-controller.yaml# 18 - loongson,ls2k-i2c 19 - loongson,ls7a-i2c 28 - compatible [all …]
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H A D | i2c-exynos5.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id [all...] |
H A D | apple,i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/apple,i2c.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Apple/PASemi I2C controller 10 - Sven Peter <sven@svenpeter.dev> 13 Apple SoCs such as the M1 come with a I2C controller based on the one found 19 - $ref: /schemas/i2c/i2c-controller.yaml# 24 - enum: 25 - apple,t8103-i2c [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
H A D | mt6797.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 7 #include <dt-bindings/clock/mt6797-clk.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/pinctrl/mt6797-pinfunc.h> 14 interrupt-parent = <&sysirq>; 15 #address-cells = <2>; 16 #size-cells = <2>; 19 compatible = "arm,psci-0.2"; 24 #address-cells = <1>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/net/ |
H A D | mctp-i2c-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/mctp-i2c-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MCTP I2C transport 10 - Matt Johnston <matt@codeconstruct.com.au> 13 An mctp-i2c-controller defines a local MCTP endpoint on an I2C controller. 14 MCTP I2C is specified by DMTF DSP0237. 16 An mctp-i2c-controller must be attached to an I2C adapter which supports 17 slave functionality. I2C busses (either directly or as subordinate mux [all …]
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/freebsd/sys/contrib/device-tree/Bindings/fsi/ |
H A D | fsi.txt | 4 The FSI bus is probe-able, so the OS is able to enumerate FSI slaves, and 6 nodes to probed engines. This allows for fsi engines to expose non-probeable 8 that is an I2C master - the I2C bus can be described by the device tree under 13 the fsi-master-* binding specifications. 18 fsi-master { 19 /* top-level of FSI bus topology, bound to an FSI master driver and 22 fsi-slave@<link,id> { 26 fsi-slave-engine@<addr> { 32 fsi-slave-engine@<addr> { 39 Note that since the bus is probe-able, some (or all) of the topology may [all …]
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