| /freebsd/sys/contrib/device-tree/src/riscv/sifive/ |
| H A D | fu540-c000.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2018-2019 SiFive, Inc */
4 /dts-v1/;
6 #include <dt-bindings/clock/sifive-fu540-prci.h>
9 #address-cells = <2>;
10 #size-cell
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| H A D | fu740-c000.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 /dts-v1/;
6 #include <dt-bindings/clock/sifive-fu740-prci.h>
9 #address-cells = <2>;
10 #size-cells = <2>;
11 compatible = "sifive,fu740-c00
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| /freebsd/sys/contrib/device-tree/src/riscv/microchip/ |
| H A D | microchip-mpfs.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2021 Microchip Technology Inc */
4 /dts-v1/;
5 #include "dt-bindings/clock/microchip,mpfs-clock.h"
6 #include "microchip-mpfs-fabric.dtsi"
9 #address-cells = <2>;
10 #size-cells = <2>;
15 #address-cells = <1>;
16 #size-cells = <0>;
21 i-cache-block-size = <64>;
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| H A D | mpfs.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2021 Microchip Technology Inc */
4 /dts-v1/;
5 #include "dt-bindings/clock/microchip,mpfs-clock.h"
8 #address-cells = <2>;
9 #size-cells = <2>;
14 #address-cells = <1>;
15 #size-cells = <0>;
16 timebase-frequency = <1000000>;
21 i-cache-block-size = <64>;
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| /freebsd/sys/contrib/device-tree/src/riscv/starfive/ |
| H A D | jh7100.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
8 #include <dt-bindings/clock/starfive-jh7100.h>
9 #include <dt-bindings/reset/starfive-jh7100.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
17 #address-cells = <1>;
18 #size-cells = <0>;
21 compatible = "sifive,u74-mc", "riscv";
23 d-cache-block-size = <64>;
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| H A D | jh7110.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
8 #include <dt-bindings/clock/starfive,jh7110-crg.h>
9 #include <dt-bindings/power/starfive,jh7110-pmu.h>
10 #include <dt-bindings/reset/starfive,jh7110-crg.h>
11 #include <dt-bindings/thermal/thermal.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
19 #address-cells = <1>;
20 #size-cells = <0>;
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| /freebsd/sys/contrib/device-tree/src/powerpc/ |
| H A D | microwatt.dts | 1 /dts-v1/;
4 #size-cells = <0x02>;
5 #address-cells = <0x02>;
6 model-name = "microwatt";
7 compatible = "microwatt-soc";
13 reserved-memory {
14 #size-cells = <0x02>;
15 #address-cells = <0x02>;
26 #clock-cells = <0>;
27 compatible = "fixed-clock";
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| /freebsd/sys/contrib/device-tree/Bindings/riscv/ |
| H A D | cpus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V CPUs
10 - Paul Walmsley <paul.walmsley@sifive.com>
11 - Palmer Dabbelt <palmer@sifive.com>
12 - Conor Dooley <conor@kernel.org>
15 This document uses some terminology common to the RISC-V community
19 mandated by the RISC-V ISA: a PC and some registers. This
27 - $ref: /schemas/cpu.yaml#
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| /freebsd/crypto/openssl/util/ |
| H A D | add-depends.pl | 2 # Copyright 2018-2022 The OpenSSL Project Authors. All Rights Reserved.
35 # is, sets $rebuild.
42 ( ( grep { $unified_info{sources}->{$_}->[0] =~ /\.cc?$/ }
44 ( grep { $unified_info{shared_sources}->{$_}->[0] =~ /\.cc?$/ }
77 (my $objfile = shift) =~ s|\.d$|.o|i;
95 if (-f $x) {
103 print STDERR "DEBUG[$producer]: ignoring $objfile <- $line\n"
114 # well with out-of-source-tree builds, so we must resort to tricks
118 (my $objfile = shift) =~ s|\.d$|.o|i;
153 (my $objfile = shift) =~ s|\.D$|.OBJ|i;
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| /freebsd/sys/powerpc/booke/ |
| H A D | trap_subr.S | 1 /*-
2 * Copyright (C) 2006-2009 Semihalf, Rafal Jaworowski <raj@semihalf.com>
29 /*-
72 * SPRG0 - pcpu pointer
73 * SPRG1 - all interrupts except TLB miss, critical, machine check
74 * SPRG2 - critical
75 * SPRG3 - machine check
76 * SPRG4-6 - scratch
80 /* Get the per-CPU data structure */
94 * sprg_sp - SPRG{1-3} reg used to temporarily store the SP
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| /freebsd/sys/i386/include/ |
| H A D | pcpu.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
41 char padding[128 - (2 * sizeof(int))];
47 * pmap.c and mp_machdep.c sets up the data for the AP's to "see" when
55 struct pcpu *pc_prvspace; /* Self-reference */ \
82 uint32_t pc_smp_tlb_done; /* TLB op acknowledgement */ \
97 * Evaluates to the byte offset of the per-cp
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| /freebsd/contrib/llvm-project/clang/lib/Sema/ |
| H A D | TreeTransform.h | 1 //===------- TreeTransform.h - Semantic Tree Transformation -----*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
66 /// transformation is performed for non-type template parameters and
69 /// This tree-transformation template uses static polymorphism to allow
86 /// most coarse-grained transformations involve replacing TransformType(),
91 /// For more fine-grained transformations, subclasses can replace any of the
106 /// default locations and entity names used for type-checking
110 /// Private RAII object that helps us forget and then re-remember
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| H A D | SemaTemplateInstantiate.cpp | 1 //===------- SemaTemplateInstantiate.cpp - C++ Template Instantiation ------===/
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //===----------------------------------------------------------------------===/
10 //===----------------------------------------------------------------------===/
49 //===----------------------------------------------------------------------===/
51 //===----------------------------------------------------------------------===/
76 return ChangeDecl(CurDecl->getDeclContext()); in UseNextDecl()
95 LambdaCallOperator->getDescribedTemplate()); in getPrimaryTemplateOfGenericLambda()
96 FTD && FTD->getInstantiatedFromMemberTemplate()) { in getPrimaryTemplateOfGenericLambda()
98 FTD->getInstantiatedFromMemberTemplate()->getTemplatedDecl(); in getPrimaryTemplateOfGenericLambda()
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| /freebsd/sys/amd64/amd64/ |
| H A D | pmap.c | 1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
12 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
47 /*-
49 * Copyright (c) 2014-2020 The FreeBSD Foundation
55 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
92 * this module may throw away valid virtual-to-physical
94 * of virtual-to-physical mappings must be done as
98 * make virtual-to-physical map invalidates expensive,
180 return ((pmap->pm_type == PT_EPT) || (pmap->pm_type == PT_RVI)); in pmap_type_guest()
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| H A D | trap.c | 1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
135 [T_NMI] = "non-maskable interrupt trap",
145 [T_XMMFLT] = "SIMD floating-point exception",
170 * 0 - only enable flush on return from NMI if required by vmm.ko (default)
171 * >1 - always flush on return from NMI.
173 * Post-boot, the sysctl indicates if flushing is currently enabled.
227 size_t i; in trap() local
232 p = td->td_proc; in trap()
239 type = frame->tf_trapno; in trap()
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| /freebsd/sys/arm/include/ |
| H A D | armreg.h | 3 /*-
4 * SPDX-License-Identifier: BSD-4-Clause
7 * Copyright (c) 1994-1996 Mark Brinicombe.
69 /* The high-order byte is always the implementor */
77 #define CPU_ID_INTEL 0x69000000 /* 'i' */
88 /* On recent ARMs this byte holds the architecture and variant (sub-model) */
145 /* XXX: Cortex-A1
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| /freebsd/sys/i386/i386/ |
| H A D | pmap.c | 1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
10 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
45 /*-
54 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
89 * this module may throw away valid virtual-to-physical
91 * of virtual-to-physical mappings must be done as
95 * make virtual-to-physical map invalidates expensive,
192 #define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT]))
205 static int pgeflag = 0; /* PG_G or-in */
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| /freebsd/sys/contrib/xen/hvm/ |
| H A D | params.h | 51 * How should CPU0 event-channel notifications be delivered?
53 * If val == 0 then CPU0 event-channel notifications are not delivered.
79 * val[15:8] is interrupt flag of the PPI used by event-channel:
82 * val[7:0] is a PPI number used by event-channel.
91 * These are not used by Xen. They are here for convenience of HVM-guest
106 …* (See http://download.microsoft.com/download/A/B/4/AB43A34E-BDD0-4FA6-BDEF-79EEF16E880B/Hyperviso…
114 /* Base+Freq viridian feature sets:
116 * - Hypercall MSRs (HV_X64_MSR_GUEST_OS_ID and HV_X64_MSR_HYPERCALL)
117 * - APIC access MSRs (HV_X64_MSR_EOI, HV_X64_MSR_ICR and HV_X64_MSR_TPR)
118 * - Virtual Processor index MSR (HV_X64_MSR_VP_INDEX)
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| /freebsd/sys/powerpc/powerpc/ |
| H A D | trap.c | 1 /*-
81 sizeof(struct callframe) - 3*sizeof(register_t))) /* more args go here */
128 { EXC_FPU, "floating-point unavailable" },
131 { EXC_FIT, "fixed-interval timer" },
135 { EXC_FPA, "floating-point assist" },
142 { EXC_ITMISS, "instruction tlb miss" },
143 { EXC_DLMISS, "data load tlb miss" },
144 { EXC_DSMISS, "data store tlb miss" },
184 for (pe = powerpc_exceptions; pe->vector != EXC_LAST; pe++) { in trapname()
185 if (pe->vector == vector) in trapname()
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| /freebsd/sys/powerpc/aim/ |
| H A D | mmu_radix.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
88 #include <powerpc/pseries/phyp-hvcall.h>
94 #define PPC_BITLSHIFT(bit) (sizeof(long)*NBBY - 1 - (bit))
115 #define NLS_MASK ((1UL<<5)-1)
117 #define RPTE_MASK (RPTE_ENTRIES-1)
120 #define NLB_MASK (((1UL<<52)-1) << 8)
129 #define POWER9_TLB_SETS_RADIX 128 /* # sets in POWER9 TLB Radix mode */
180 #define TLBIE_RIC_INVALIDATE_TLB 0x0 /* Invalidate just TLB */
182 #define TLBIE_RIC_INVALIDATE_ALL 0x2 /* Invalidate TLB, PWC,
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| /freebsd/sys/arm64/arm64/ |
| H A D | pmap.c | 1 /*-
10 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
14 * Copyright (c) 2014-2016 The FreeBSD Foundation
52 /*-
59 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
90 * this module may throw away valid virtual-to-physical
92 * of virtual-to-physical mappings must be done as
96 * make virtual-to-physical map invalidates expensive,
160 #define PMAP_ASSERT_STAGE1(pmap) MPASS((pmap)->pm_stage == PM_STAGE1)
161 #define PMAP_ASSERT_STAGE2(pmap) MPASS((pmap)->pm_stage == PM_STAGE2)
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| /freebsd/sys/arm/freescale/imx/ |
| H A D | imx6_machdep.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
67 * data for imx6 now sets the interrupt parent for most devices to the GPC
68 * interrupt controller, which is for use when the chip is in deep-sleep mode.
69 * We don't support deep sleep or have a GPC-PIC driver; we need all interrupts
75 * set the world right by just changing the interrupt-parent property of the soc
84 * - SOC node exists and has GPC as its interrupt parent.
85 * - GPC node exists and has GIC as its interrupt parent.
86 * - GIC node exists and is its own interrupt parent or has no parent.
90 * per-soc logic. We handle this at platform attach time rather than via the
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| /freebsd/sys/dev/agp/ |
| H A D | agp.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
109 int busnum, numkids, i; in agp_find_display() local
117 for (i = 0; i < numkids; i++) { in agp_find_display()
118 dev = kids[i]; in agp_find_display()
154 gatt->ag_entries = entries; in agp_alloc_gatt()
155 gatt->ag_virtual = kmem_alloc_contig(entries * sizeof(uint32_t), in agp_alloc_gatt()
157 if (!gatt->ag_virtual) { in agp_alloc_gatt()
163 gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual); in agp_alloc_gatt()
171 kmem_free(gatt->ag_virtual, gatt->ag_entries * sizeof(uint32_t)); in agp_free_gatt()
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| /freebsd/sys/x86/x86/ |
| H A D | mca.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
102 static int mca_banks; /* Number of per-CPU register banks. */
103 static int mca_maxcount = -1; /* Limit on records stored. (-1 = unlimited) */
118 "Administrative toggle for logging of level one TLB parity (L1TP) errors");
142 "Should the system send non-fatal machine check errors to the log "
180 if (error != 0 || req->newptr == NULL) in sysctl_mca_log_interval()
251 static int amd_elvt = -1;
260 * The RASCap register is wholly reserved in families 0x10-0x15 (through model 1F). in amd_thresholding_supported()
313 if (error || req->newptr == NULL) in sysctl_positive_int()
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| /freebsd/sys/arm/arm/ |
| H A D | pmap-v6.c | 1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause AND BSD-2-Clause
7 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
8 * Copyright (c) 2014-2016 Svatopluk Kraus <skra@FreeBSD.org>
9 * Copyright (c) 2014-2016 Michal Meloun <mmel@FreeBSD.org>
40 /*-
47 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
78 * this module may throw away valid virtual-to-physical
80 * of virtual-to-physical mappings must be done as
84 * make virtual-to-physical map invalidates expensive,
[all …]
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