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/linux/drivers/net/ethernet/atheros/alx/
H A Dhw.c39 #include "hw.h"
46 static int alx_wait_mdio_idle(struct alx_hw *hw) in alx_wait_mdio_idle() argument
52 val = alx_read_mem32(hw, ALX_MDIO); in alx_wait_mdio_idle()
61 static int alx_read_phy_core(struct alx_hw *hw, bool ext, u8 dev, in alx_read_phy_core() argument
70 clk_sel = hw->link_speed != SPEED_UNKNOWN ? in alx_read_phy_core()
77 alx_write_mem32(hw, ALX_MDIO_EXTN, val); in alx_read_phy_core()
88 alx_write_mem32(hw, ALX_MDIO, val); in alx_read_phy_core()
90 err = alx_wait_mdio_idle(hw); in alx_read_phy_core()
93 val = alx_read_mem32(hw, ALX_MDIO); in alx_read_phy_core()
98 static int alx_write_phy_core(struct alx_hw *hw, bool ext, u8 dev, in alx_write_phy_core() argument
[all …]
/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_phy.c12 static void ixgbe_i2c_start(struct ixgbe_hw *hw);
13 static void ixgbe_i2c_stop(struct ixgbe_hw *hw);
14 static int ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data);
15 static int ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, u8 data);
16 static int ixgbe_get_i2c_ack(struct ixgbe_hw *hw);
17 static int ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data);
18 static int ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data);
19 static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
20 static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
21 static int ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data);
[all …]
H A Dixgbe_common.c13 static int ixgbe_acquire_eeprom(struct ixgbe_hw *hw);
14 static int ixgbe_get_eeprom_semaphore(struct ixgbe_hw *hw);
15 static void ixgbe_release_eeprom_semaphore(struct ixgbe_hw *hw);
16 static int ixgbe_ready_eeprom(struct ixgbe_hw *hw);
17 static void ixgbe_standby_eeprom(struct ixgbe_hw *hw);
18 static void ixgbe_shift_out_eeprom_bits(struct ixgbe_hw *hw, u16 data,
20 static u16 ixgbe_shift_in_eeprom_bits(struct ixgbe_hw *hw, u16 count);
21 static void ixgbe_raise_eeprom_clk(struct ixgbe_hw *hw, u32 *eec);
22 static void ixgbe_lower_eeprom_clk(struct ixgbe_hw *hw, u32 *eec);
23 static void ixgbe_release_eeprom(struct ixgbe_hw *hw);
[all …]
/linux/drivers/isdn/hardware/mISDN/
H A DmISDNinfineon.c103 spinlock_t lock; /* HW access lock */
268 struct inf_hw *hw = dev_id; in diva_irq() local
271 spin_lock(&hw->lock); in diva_irq()
272 val = inb((u32)hw->cfg.start + DIVA_PCI_CTRL); in diva_irq()
274 spin_unlock(&hw->lock); in diva_irq()
277 hw->irqcnt++; in diva_irq()
278 mISDNipac_irq(&hw->ipac, irqloops); in diva_irq()
279 spin_unlock(&hw->lock); in diva_irq()
286 struct inf_hw *hw = dev_id; in diva20x_irq() local
289 spin_lock(&hw->lock); in diva20x_irq()
[all …]
/linux/drivers/clk/sprd/
H A Dsc9863a-clk.c57 [CLK_MPLL0_GATE] = &mpll0_gate.common.hw,
58 [CLK_DPLL0_GATE] = &dpll0_gate.common.hw,
59 [CLK_LPLL_GATE] = &lpll_gate.common.hw,
60 [CLK_GPLL_GATE] = &gpll_gate.common.hw,
61 [CLK_DPLL1_GATE] = &dpll1_gate.common.hw,
62 [CLK_MPLL1_GATE] = &mpll1_gate.common.hw,
63 [CLK_MPLL2_GATE] = &mpll2_gate.common.hw,
64 [CLK_ISPPLL_GATE] = &isppll_gate.common.hw,
93 static CLK_FIXED_FACTOR_HW(twpll_768m, "twpll-768m", &twpll.common.hw, 2, 1, 0);
94 static CLK_FIXED_FACTOR_HW(twpll_384m, "twpll-384m", &twpll.common.hw, 4, 1, 0);
[all …]
H A Dums512-clk.c30 /* some pll clocks configure CLK_IGNORE_UNUSED because hw dvfs does not call
31 * clock interface. hw dvfs can not gate the pll clock.
83 [CLK_26M_AUD] = &clk_26m_aud.hw,
84 [CLK_13M] = &clk_13m.hw,
85 [CLK_6M5] = &clk_6m5.hw,
86 [CLK_4M3] = &clk_4m3.hw,
87 [CLK_2M] = &clk_2m.hw,
88 [CLK_1M] = &clk_1m.hw,
89 [CLK_250K] = &clk_250k.hw,
90 [CLK_RCO_25M] = &rco_25m.hw,
[all …]
/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_adminq.c9 static void i40e_resume_aq(struct i40e_hw *hw);
13 * @hw: pointer to the hardware structure
15 static int i40e_alloc_adminq_asq_ring(struct i40e_hw *hw) in i40e_alloc_adminq_asq_ring() argument
19 ret_code = i40e_allocate_dma_mem(hw, &hw->aq.asq.desc_buf, in i40e_alloc_adminq_asq_ring()
20 (hw->aq.num_asq_entries * in i40e_alloc_adminq_asq_ring()
26 ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.cmd_buf, in i40e_alloc_adminq_asq_ring()
27 (hw->aq.num_asq_entries * in i40e_alloc_adminq_asq_ring()
30 i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); in i40e_alloc_adminq_asq_ring()
39 * @hw: pointer to the hardware structure
41 static int i40e_alloc_adminq_arq_ring(struct i40e_hw *hw) in i40e_alloc_adminq_arq_ring() argument
[all …]
H A Di40e_prototype.h20 int i40e_init_adminq(struct i40e_hw *hw);
21 void i40e_shutdown_adminq(struct i40e_hw *hw);
22 int i40e_clean_arq_element(struct i40e_hw *hw,
26 i40e_asq_send_command(struct i40e_hw *hw, struct i40e_aq_desc *desc,
30 i40e_asq_send_command_v2(struct i40e_hw *hw,
37 i40e_asq_send_command_atomic(struct i40e_hw *hw, struct i40e_aq_desc *desc,
42 i40e_asq_send_command_atomic_v2(struct i40e_hw *hw,
51 void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask,
54 bool i40e_check_asq_alive(struct i40e_hw *hw);
55 int i40e_aq_queue_shutdown(struct i40e_hw *hw, bool unloading);
[all …]
H A Di40e_nvm.c11 * @hw: pointer to the HW structure
19 int i40e_init_nvm(struct i40e_hw *hw) in i40e_init_nvm() argument
21 struct i40e_nvm_info *nvm = &hw->nvm; in i40e_init_nvm()
29 gens = rd32(hw, I40E_GLNVM_GENS); in i40e_init_nvm()
35 fla = rd32(hw, I40E_GLNVM_FLA); in i40e_init_nvm()
43 i40e_debug(hw, I40E_DEBUG_NVM, "NVM init error: unsupported blank mode.\n"); in i40e_init_nvm()
51 * @hw: pointer to the HW structure
57 int i40e_acquire_nvm(struct i40e_hw *hw, in i40e_acquire_nvm() argument
64 if (hw->nvm.blank_nvm_mode) in i40e_acquire_nvm()
67 ret_code = i40e_aq_request_resource(hw, I40E_NVM_RESOURCE_ID, access, in i40e_acquire_nvm()
[all …]
/linux/drivers/clk/sophgo/
H A Dclk-cv1800.c71 { .hw = &clk_mipimpll.common.hw },
75 { .hw = &clk_mipimpll.common.hw },
79 { .hw = &clk_fpll.common.hw },
167 { .hw = &clk_cam0pll.common.hw },
187 { .hw = &clk_tpll.common.hw },
188 { .hw = &clk_a0pll.common.hw },
189 { .hw = &clk_mipimpll.common.hw },
190 { .hw = &clk_fpll.common.hw },
211 { .hw = &clk_axi6.div.common.hw },
215 { .hw = &clk_axi6.div.common.hw },
[all …]
/linux/drivers/clk/meson/
H A Dg12a.c64 .hw.init = &(struct clk_init_data){
81 .hw.init = &(struct clk_init_data){
85 &g12a_fixed_pll_dco.hw
129 .hw.init = &(struct clk_init_data){
148 .hw.init = &(struct clk_init_data){
152 &g12a_sys_pll_dco.hw
188 .hw.init = &(struct clk_init_data){
207 .hw.init = &(struct clk_init_data){
211 &g12b_sys1_pll_dco.hw
223 .hw.init = &(struct clk_init_data) {
[all …]
H A Dmeson8b.c90 .hw.init = &(struct clk_init_data){
109 .hw.init = &(struct clk_init_data){
113 &meson8b_fixed_pll_dco.hw
126 .hw.init = &(struct clk_init_data){
209 .hw.init = &(struct clk_init_data){
214 &hdmi_pll_dco_in.hw
227 .hw.init = &(struct clk_init_data){
231 &meson8b_hdmi_pll_dco.hw
245 .hw.init = &(struct clk_init_data){
249 &meson8b_hdmi_pll_dco.hw
[all …]
H A Dgxbb.c119 .hw.init = &(struct clk_init_data){
136 .hw.init = &(struct clk_init_data){
140 &gxbb_fixed_pll_dco.hw
153 .hw.init = &(struct clk_init_data){
196 .hw.init = &(struct clk_init_data){
200 &gxbb_hdmi_pll_pre_mult.hw
250 .hw.init = &(struct clk_init_data){
272 .hw.init = &(struct clk_init_data){
276 &gxbb_hdmi_pll_dco.hw
290 .hw.init = &(struct clk_init_data){
[all …]
H A Daxg-audio.c31 .hw.init = &(struct clk_init_data) { \
47 .hw.init = &(struct clk_init_data){ \
63 .hw.init = &(struct clk_init_data){ \
77 .hw.init = &(struct clk_init_data) { \
99 .hw.init = &(struct clk_init_data) { \
127 .hw.init = &(struct clk_init_data) { \
144 .hw.init = &(struct clk_init_data) { \
167 .hw.init = &(struct clk_init_data) { \
646 .hw.init = &(struct clk_init_data) {
662 .hw.init = &(struct clk_init_data) {
[all …]
/linux/drivers/net/ethernet/atheros/atl1c/
H A Datl1c_hw.c19 int atl1c_check_eeprom_exist(struct atl1c_hw *hw) in atl1c_check_eeprom_exist() argument
23 AT_READ_REG(hw, REG_TWSI_DEBUG, &data); in atl1c_check_eeprom_exist()
27 AT_READ_REG(hw, REG_MASTER_CTRL, &data); in atl1c_check_eeprom_exist()
33 void atl1c_hw_set_mac_addr(struct atl1c_hw *hw, u8 *mac_addr) in atl1c_hw_set_mac_addr() argument
45 AT_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 0, value); in atl1c_hw_set_mac_addr()
49 AT_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 1, value); in atl1c_hw_set_mac_addr()
53 static bool atl1c_read_current_addr(struct atl1c_hw *hw, u8 *eth_addr) in atl1c_read_current_addr() argument
57 AT_READ_REG(hw, REG_MAC_STA_ADDR, &addr[0]); in atl1c_read_current_addr()
58 AT_READ_REG(hw, REG_MAC_STA_ADDR + 4, &addr[1]); in atl1c_read_current_addr()
70 static int atl1c_get_permanent_address(struct atl1c_hw *hw) in atl1c_get_permanent_address() argument
[all …]
/linux/drivers/net/ethernet/intel/iavf/
H A Diavf_adminq.c12 * @hw: pointer to the hardware structure
14 static enum iavf_status iavf_alloc_adminq_asq_ring(struct iavf_hw *hw) in iavf_alloc_adminq_asq_ring() argument
18 ret_code = iavf_allocate_dma_mem(hw, &hw->aq.asq.desc_buf, in iavf_alloc_adminq_asq_ring()
20 (hw->aq.num_asq_entries * in iavf_alloc_adminq_asq_ring()
26 ret_code = iavf_allocate_virt_mem(hw, &hw->aq.asq.cmd_buf, in iavf_alloc_adminq_asq_ring()
27 (hw->aq.num_asq_entries * in iavf_alloc_adminq_asq_ring()
30 iavf_free_dma_mem(hw, &hw->aq.asq.desc_buf); in iavf_alloc_adminq_asq_ring()
39 * @hw: pointer to the hardware structure
41 static enum iavf_status iavf_alloc_adminq_arq_ring(struct iavf_hw *hw) in iavf_alloc_adminq_arq_ring() argument
45 ret_code = iavf_allocate_dma_mem(hw, &hw->aq.arq.desc_buf, in iavf_alloc_adminq_arq_ring()
[all …]
/linux/drivers/vdpa/ifcvf/
H A Difcvf_base.c13 u16 ifcvf_set_vq_vector(struct ifcvf_hw *hw, u16 qid, int vector) in ifcvf_set_vq_vector() argument
15 struct virtio_pci_common_cfg __iomem *cfg = hw->common_cfg; in ifcvf_set_vq_vector()
23 u16 ifcvf_set_config_vector(struct ifcvf_hw *hw, int vector) in ifcvf_set_config_vector() argument
25 struct virtio_pci_common_cfg __iomem *cfg = hw->common_cfg; in ifcvf_set_config_vector()
32 static void __iomem *get_cap_addr(struct ifcvf_hw *hw, in get_cap_addr() argument
43 IFCVF_DBG(hw->pdev, in get_cap_addr()
48 if (offset + length > pci_resource_len(hw->pdev, bar)) { in get_cap_addr()
49 IFCVF_DBG(hw->pdev, in get_cap_addr()
55 return hw->base[bar] + offset; in get_cap_addr()
72 u16 ifcvf_get_vq_size(struct ifcvf_hw *hw, u16 qid) in ifcvf_get_vq_size() argument
[all …]
/linux/drivers/clk/qcom/
H A Dclk-rpmh.c37 * @hw: handle between common and hardware-specific interfaces
51 struct clk_hw hw; member
84 .hw.init = &(struct clk_init_data){ \
102 .hw.init = &(struct clk_init_data){ \
126 .hw.init = &(struct clk_init_data){ \
134 return container_of(_hw, struct clk_rpmh, hw); in to_clk_rpmh()
213 static int clk_rpmh_prepare(struct clk_hw *hw) in clk_rpmh_prepare() argument
215 struct clk_rpmh *c = to_clk_rpmh(hw); in clk_rpmh_prepare()
225 static void clk_rpmh_unprepare(struct clk_hw *hw) in clk_rpmh_unprepare() argument
227 struct clk_rpmh *c = to_clk_rpmh(hw); in clk_rpmh_unprepare()
[all …]
/linux/drivers/scsi/csiostor/
H A Dcsio_init.c68 struct csio_hw *hw = file->private_data - mem; in csio_mem_read() local
83 ret = hw->chip_ops->chip_mc_read(hw, 0, pos, in csio_mem_read()
86 ret = hw->chip_ops->chip_edc_read(hw, mem, pos, in csio_mem_read()
112 void csio_add_debugfs_mem(struct csio_hw *hw, const char *name, in csio_add_debugfs_mem() argument
115 debugfs_create_file_size(name, S_IRUSR, hw->debugfs_root, in csio_add_debugfs_mem()
116 (void *)hw + idx, &csio_mem_debugfs_fops, in csio_add_debugfs_mem()
120 static int csio_setup_debugfs(struct csio_hw *hw) in csio_setup_debugfs() argument
124 if (IS_ERR_OR_NULL(hw->debugfs_root)) in csio_setup_debugfs()
127 i = csio_rd_reg32(hw, MA_TARGET_MEM_ENABLE_A); in csio_setup_debugfs()
129 csio_add_debugfs_mem(hw, "edc0", MEM_EDC0, 5); in csio_setup_debugfs()
[all …]
H A Dcsio_isr.c47 struct csio_hw *hw = (struct csio_hw *) dev_id; in csio_nondata_isr() local
51 if (unlikely(!hw)) in csio_nondata_isr()
54 if (unlikely(pci_channel_offline(hw->pdev))) { in csio_nondata_isr()
55 CSIO_INC_STATS(hw, n_pcich_offline); in csio_nondata_isr()
59 spin_lock_irqsave(&hw->lock, flags); in csio_nondata_isr()
60 csio_hw_slow_intr_handler(hw); in csio_nondata_isr()
61 rv = csio_mb_isr_handler(hw); in csio_nondata_isr()
63 if (rv == 0 && !(hw->flags & CSIO_HWF_FWEVT_PENDING)) { in csio_nondata_isr()
64 hw->flags |= CSIO_HWF_FWEVT_PENDING; in csio_nondata_isr()
65 spin_unlock_irqrestore(&hw->lock, flags); in csio_nondata_isr()
[all …]
H A Dcsio_hw.c102 static void csio_hw_initialize(struct csio_hw *hw);
103 static void csio_evtq_stop(struct csio_hw *hw);
104 static void csio_evtq_start(struct csio_hw *hw);
106 int csio_is_hw_ready(struct csio_hw *hw) in csio_is_hw_ready() argument
108 return csio_match_state(hw, csio_hws_ready); in csio_is_hw_ready()
111 int csio_is_hw_removing(struct csio_hw *hw) in csio_is_hw_removing() argument
113 return csio_match_state(hw, csio_hws_removing); in csio_is_hw_removing()
119 * @hw: the HW module
133 csio_hw_wait_op_done_val(struct csio_hw *hw, int reg, uint32_t mask, in csio_hw_wait_op_done_val() argument
138 val = csio_rd_reg32(hw, reg); in csio_hw_wait_op_done_val()
[all …]
/linux/drivers/spi/
H A Dspi-altera-core.c43 static int altr_spi_writel(struct altera_spi *hw, unsigned int reg, in altr_spi_writel() argument
48 ret = regmap_write(hw->regmap, hw->regoff + reg, val); in altr_spi_writel()
50 dev_err(hw->dev, "fail to write reg 0x%x val 0x%x: %d\n", in altr_spi_writel()
56 static int altr_spi_readl(struct altera_spi *hw, unsigned int reg, in altr_spi_readl() argument
61 ret = regmap_read(hw->regmap, hw->regoff + reg, val); in altr_spi_readl()
63 dev_err(hw->dev, "fail to read reg 0x%x: %d\n", reg, ret); in altr_spi_readl()
75 struct altera_spi *hw = altera_spi_to_hw(spi); in altera_spi_set_cs() local
78 hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK; in altera_spi_set_cs()
79 altr_spi_writel(hw, ALTERA_SPI_CONTROL, hw->imr); in altera_spi_set_cs()
80 altr_spi_writel(hw, ALTERA_SPI_TARGET_SEL, 0); in altera_spi_set_cs()
[all …]
/linux/drivers/net/fjes/
H A Dfjes_hw.c23 u32 fjes_hw_rd32(struct fjes_hw *hw, u32 reg) in fjes_hw_rd32() argument
25 u8 *base = hw->base; in fjes_hw_rd32()
33 static u8 *fjes_hw_iomap(struct fjes_hw *hw) in fjes_hw_iomap() argument
37 if (!request_mem_region(hw->hw_res.start, hw->hw_res.size, in fjes_hw_iomap()
43 base = (u8 *)ioremap(hw->hw_res.start, hw->hw_res.size); in fjes_hw_iomap()
48 static void fjes_hw_iounmap(struct fjes_hw *hw) in fjes_hw_iounmap() argument
50 iounmap(hw->base); in fjes_hw_iounmap()
51 release_mem_region(hw->hw_res.start, hw->hw_res.size); in fjes_hw_iounmap()
54 int fjes_hw_reset(struct fjes_hw *hw) in fjes_hw_reset() argument
74 static int fjes_hw_get_max_epid(struct fjes_hw *hw) in fjes_hw_get_max_epid() argument
[all …]
/linux/drivers/scsi/elx/efct/
H A Defct_hw.c34 efct_hw_link_event_init(struct efct_hw *hw) in efct_hw_link_event_init() argument
36 hw->link.status = SLI4_LINK_STATUS_MAX; in efct_hw_link_event_init()
37 hw->link.topology = SLI4_LINK_TOPO_NONE; in efct_hw_link_event_init()
38 hw->link.medium = SLI4_LINK_MEDIUM_MAX; in efct_hw_link_event_init()
39 hw->link.speed = 0; in efct_hw_link_event_init()
40 hw->link.loop_map = NULL; in efct_hw_link_event_init()
41 hw->link.fc_id = U32_MAX; in efct_hw_link_event_init()
47 efct_hw_read_max_dump_size(struct efct_hw *hw) in efct_hw_read_max_dump_size() argument
50 struct efct *efct = hw->os; in efct_hw_read_max_dump_size()
58 if (sli_cmd_common_set_dump_location(&hw->sli, buf, 1, 0, NULL, 0)) in efct_hw_read_max_dump_size()
[all …]
/linux/drivers/net/ethernet/intel/ixgbevf/
H A Dmbx.c9 * @hw: pointer to the HW structure
13 static s32 ixgbevf_poll_for_msg(struct ixgbe_hw *hw) in ixgbevf_poll_for_msg() argument
15 struct ixgbe_mbx_info *mbx = &hw->mbx; in ixgbevf_poll_for_msg()
21 while (countdown && mbx->ops.check_for_msg(hw)) { in ixgbevf_poll_for_msg()
31 * @hw: pointer to the HW structure
35 static s32 ixgbevf_poll_for_ack(struct ixgbe_hw *hw) in ixgbevf_poll_for_ack() argument
37 struct ixgbe_mbx_info *mbx = &hw->mbx; in ixgbevf_poll_for_ack()
43 while (countdown && mbx->ops.check_for_ack(hw)) { in ixgbevf_poll_for_ack()
53 * @hw: pointer to the HW structure
58 static u32 ixgbevf_read_mailbox_vf(struct ixgbe_hw *hw) in ixgbevf_read_mailbox_vf() argument
[all …]

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