/freebsd/sys/contrib/device-tree/Bindings/usb/ |
H A D | nvidia,tegra124-xusb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/nvidia,tegra124-xusb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 20 - description: NVIDIA Tegra124 21 const: nvidia,tegra124-xusb 23 - description: NVIDIA Tegra132 25 - const: nvidia,tegra132-xusb [all …]
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H A D | nvidia,tegra124-xusb.txt | 8 -------------------- 9 - compatible: Must be: 10 - Tegra124: "nvidia,tegra124-xusb" 11 - Tegra132: "nvidia,tegra132-xusb", "nvidia,tegra124-xusb" 12 - Tegra210: "nvidia,tegra210-xusb" 13 - Tegra186: "nvidia,tegra186-xusb" 14 - reg: Must contain the base and length of the xHCI host registers, XUSB FPCI 16 - reg-names: Must contain the following entries: 17 - "hcd" 18 - "fpci" [all …]
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H A D | nvidia,tegra-xudc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/nvidia,tegra-xudc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 The Tegra XUDC controller supports both USB 2.0 HighSpeed/FullSpeed and 11 USB 3.0 SuperSpeed protocols. 14 - Nagarjuna Kristam <nkristam@nvidia.com> 15 - JC Kuo <jckuo@nvidia.com> 16 - Thierry Reding <treding@nvidia.com> 21 - enum: [all …]
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H A D | nvidia,tegra210-xusb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/nvidia,tegra210-xusb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 18 const: nvidia,tegra210-xusb 22 - description: base and length of the xHCI host registers 23 - description: base and length of the XUSB FPCI registers 24 - description: base and length of the XUSB IPFS registers [all …]
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H A D | nvidia,tegra194-xusb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/nvidia,tegra194-xusb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 18 const: nvidia,tegra194-xusb 22 - description: base and length of the xHCI host registers 23 - description: base and length of the XUSB FPCI registers 25 reg-names: [all …]
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H A D | nvidia,tegra186-xusb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/nvidia,tegra186-xusb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 18 const: nvidia,tegra186-xusb 22 - description: base and length of the xHCI host registers 23 - description: base and length of the XUSB FPCI registers 25 reg-names: [all …]
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/freebsd/sys/contrib/device-tree/Bindings/phy/ |
H A D | nvidia,tegra124-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra124-xusb-padctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 22 super-speed USB. Other lanes are for various types of low-speed, full-speed 23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller 24 contains a software-configurable mux that sits between the I/O controller [all …]
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H A D | nvidia,tegra210-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra210-xus [all...] |
H A D | nvidia,tegra124-xusb-padctl.txt | 11 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 12 super-speed USB. Other lanes are for various types of low-speed, full-speed 13 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller 14 contains a software-configurable mux that sits between the I/O controller 17 In addition to per-lane configuration, USB 3.0 ports may require additional 18 settings on a per-board basis. 20 Pads will be represented as children of the top-level XUSB pad controller 23 PHY bindings, as described by the phy-bindings.txt file in this directory. 27 "port" is typically used to denote the physical USB receptacle. The device 29 abstraction of the signals that are routed to a USB receptacle (i.e. a PHY [all …]
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/freebsd/sys/contrib/device-tree/src/arm/nvidia/ |
H A D | tegra124-nyan.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/input/input.h> 3 #include <dt-bindings/thermal/thermal.h> 14 stdout-path = "serial0:115200n8"; 20 * missing a unit-address. However, the bootloader on these Chromebook 22 * Adding the unit-address causes the bootloader to create a /memory 34 /delete-node/ memory@80000000; 40 vdd-supply = <&vdd_3v3_hdmi>; 41 pll-supply = <&vdd_hdmi_pll>; 42 hdmi-supply = <&vdd_5v0_hdmi>; [all …]
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H A D | tegra124-jetson-tk1.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 7 #include "tegra124-jetson-tk1-emc.dtsi" 11 compatible = "nvidia,jetson-tk1", "nvidia,tegra124"; 17 /* This order keeps the mapping DB9 connector <-> ttyS [all...] |
H A D | tegra124-venice2.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 18 stdout-path = "serial0:115200n8"; 29 vdd-supply = <&vdd_3v3_hdmi>; 30 pll-supply = <&vdd_hdmi_pll>; 31 hdmi-supply = <&vdd_5v0_hdmi>; 33 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 34 nvidia,hpd-gpio = 41 avdd-io-hdmi-dp-supply = <&vdd_1v05_run>; [all …]
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H A D | tegra124-apalis-v1.2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 3 * Copyright 2016-2018 Toradex AG 7 #include "tegra124-apalis-emc.dtsi" 21 avddio-pex-supply = <®_1v05_vdd>; 22 avdd-pe [all...] |
H A D | tegra124-apalis.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR X11 3 * Copyright 2016-2019 Toradex AG 7 #include "tegra124-apalis-emc.dtsi" 20 avddio-pex-supply = <®_1v05_vdd>; 21 avdd-pe [all...] |
H A D | tegra30-cardhu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/input/input.h> 3 #include <dt-bindings/thermal/thermal.h> 5 #include "tegra30-cpu-opp.dtsi" 6 #include "tegra30-cpu-opp-microvol [all...] |
H A D | tegra114-dalmore.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 /dts-v1/; 9 #include <dt-bindings/input/input.h> 23 stdout-path = "serial0:115200n8"; 34 hdmi-supply = <&vdd_5v0_hdmi>; 35 vdd-supply [all...] |
H A D | tegra30-beaver.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 5 #include "tegra30-cpu-opp.dtsi" 6 #include "tegra30-cpu-opp-microvolt.dtsi" 19 stdout-pat [all...] |
/freebsd/sys/arm/nvidia/ |
H A D | tegra_xhci.c | 1 /*- 61 #include <dev/usb/usb.h> 62 #include <dev/usb/usbdi.h> 63 #include <dev/usb/usb_busdma.h> 64 #include <dev/usb/usb_process.h> 65 #include <dev/usb/usb_controller.h> 66 #include <dev/usb/usb_bus.h> 67 #include <dev/usb/controller/xhci.h> 68 #include <dev/usb/controller/xhcireg.h> 211 #define IPFS_WR4(_sc, _r, _v) bus_write_4((_sc)->mem_res_ipfs, (_r), (_v)) [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/nvidia/ |
H A D | tegra186-p3509-0000+p3636-0001.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/linux-event-codes.h> 5 #include <dt-bindings/input/gpio-keys.h> 6 #include <dt-bindings/mfd/max77620.h> 12 compatible = "nvidia,p3509-0000+p3636-0001", "nvidia,tegra186"; 30 stdout-path = "serial0:115200n8"; 41 phy-reset-gpios = <&gpio_aon TEGRA186_AON_GPIO(AA, 6) GPIO_ACTIVE_LOW>; 42 phy-handle = <&phy>; 43 phy-mode = "rgmii-id"; [all …]
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H A D | tegra132-norrin.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 18 stdout-path = "serial0:115200n8"; 30 vdd-supply = <&vdd_3v3_hdmi>; 31 pll-supply = <&vdd_hdmi_pll>; 32 hdmi-supply = <&vdd_5v0_hdmi>; 34 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 35 nvidia,hpd-gpio = 42 avdd-io-hdmi-dp-supply = <&vdd_3v3_hdmi>; [all …]
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H A D | tegra210-p3450-0000.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/gpio-keys.h> 5 #include <dt-bindings/input/linux-event-codes.h> 6 #include <dt-binding [all...] |
H A D | tegra210-p2597.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 12 ethernet = "/usb@70090000/ethernet@1"; 23 avdd-dsi-csi-supply = <&vdd_dsi_csi>; 33 avdd-io-hdmi-dp-supply = <&avdd_1v05>; 34 vdd-hdmi-dp-pll-supply = <&vdd_1v8>; 35 hdmi-supply = <&vdd_hdmi>; 37 nvidia,ddc-i2c-bus = <&hdmi_ddc>; [all …]
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H A D | tegra186-p2771-0000.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/linux-event-codes.h> 5 #include <dt-bindings/input/gpio-keys.h> 7 #include "tegra186-p3310.dtsi" 11 compatible = "nvidia,p2771-0000", "nvidia,tegra186"; 23 #address-cells = <1>; 24 #size-cells = <0>; 30 remote-endpoint = <&xbar_i2s1_ep>; 38 dai-format = "i2s"; [all …]
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H A D | tegra210-smaug.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/mfd/max77620.h> 6 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 12 compatible = "google,smaug-rev8", "google,smaug-rev7", 13 "google,smaug-rev6", "google,smaug-rev5", 14 "google,smaug-rev4", "google,smaug-rev3", 15 "google,smaug-rev2", "google,smaug-rev1", 25 stdout-path = "serial0:115200n8"; [all …]
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