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/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,usb-hsic-phy.yaml4 $id: http://devicetree.org/schemas/phy/qcom,usb-hsic-phy.yaml#
7 title: Qualcomm USB HSIC PHY Controller
17 - qcom,usb-hsic-phy-mdm9615
18 - qcom,usb-hsic-phy-msm8974
19 - const: qcom,usb-hsic-phy
57 compatible = "qcom,usb-hsic-phy-msm8974",
58 "qcom,usb-hsic-phy";
H A Dallwinner,sun9i-a80-usb-phy.yaml30 - description: HSIC 12MHz clock
31 - description: HSIC 480MHz clock
46 - description: HSIC Reset
52 - const: hsic
55 const: hsic
77 const: hsic
128 "hsic";
129 phy_type = "hsic";
H A Dmarvell,mmp3-hsic-phy.yaml5 $id: http://devicetree.org/schemas/phy/marvell,mmp3-hsic-phy.yaml#
8 title: Marvell MMP3 HSIC PHY
15 const: marvell,mmp3-hsic-phy
33 hsic-phy@f0001800 {
34 compatible = "marvell,mmp3-hsic-phy";
H A Dnvidia,tegra186-xusb-padctl.yaml23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
80 vddio-hsic-supply:
81 description: HSIC PHY power supply. Must supply 1.2 V.
148 hsic:
154 - description: HSIC tracking clock
164 hsic-0:
346 hsic-0:
423 - vddio-hsic-supply
445 vddio-hsic-supply = <&gnd>;
470 hsic {
[all …]
H A Dnvidia,tegra124-xusb-padctl.yaml23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
165 hsic:
171 - description: HSIC tracking clock
181 hsic-0:
193 hsic-1:
448 hsic-0:
456 hsic-1:
564 hsic {
566 hsic-0 {
571 hsic-1 {
[all …]
H A Dnvidia,tegra210-xusb-padctl.yaml23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
155 hsic:
161 - description: HSIC tracking clock
171 hsic-0:
183 hsic-1:
503 hsic-0:
511 hsic-1:
657 hsic {
663 hsic-0 {
668 hsic-1 {
[all …]
H A Dmarvell,pxa1928-usb-phy.yaml7 title: Marvell PXA1928 USB/HSIC PHY
16 - marvell,pxa1928-hsic-phy
/linux/drivers/phy/samsung/
H A Dphy-exynos5250-usb2.c202 u32 hsic; in exynos5250_power_on() local
286 /* HSIC phy configuration */ in exynos5250_power_on()
287 hsic = (EXYNOS_5250_HSICPHYCTRLX_REFCLKDIV_12 | in exynos5250_power_on()
290 writel(hsic, drv->reg_phy + EXYNOS_5250_HSICPHYCTRL1); in exynos5250_power_on()
291 writel(hsic, drv->reg_phy + EXYNOS_5250_HSICPHYCTRL2); in exynos5250_power_on()
293 hsic &= ~EXYNOS_5250_HSICPHYCTRLX_PHYSWRST; in exynos5250_power_on()
294 writel(hsic, drv->reg_phy + EXYNOS_5250_HSICPHYCTRL1); in exynos5250_power_on()
295 writel(hsic, drv->reg_phy + EXYNOS_5250_HSICPHYCTRL2); in exynos5250_power_on()
326 u32 hsic; in exynos5250_power_off() local
349 hsic = (EXYNOS_5250_HSICPHYCTRLX_REFCLKDIV_12 | in exynos5250_power_off()
[all …]
/linux/drivers/phy/tegra/
H A Dxusb-tegra124.c807 TEGRA124_LANE("hsic-0", 0x004, 14, 0x1, hsic),
808 TEGRA124_LANE("hsic-1", 0x004, 15, 0x1, hsic),
815 struct tegra_xusb_hsic_lane *hsic; in tegra124_hsic_lane_probe() local
818 hsic = kzalloc(sizeof(*hsic), GFP_KERNEL); in tegra124_hsic_lane_probe()
819 if (!hsic) in tegra124_hsic_lane_probe()
822 INIT_LIST_HEAD(&hsic->base.list); in tegra124_hsic_lane_probe()
823 hsic->base.soc = &pad->soc->lanes[index]; in tegra124_hsic_lane_probe()
824 hsic->base.index = index; in tegra124_hsic_lane_probe()
825 hsic->base.pad = pad; in tegra124_hsic_lane_probe()
826 hsic->base.np = np; in tegra124_hsic_lane_probe()
[all …]
H A Dxusb.c297 if (strcmp(soc->name, "hsic") == 0) in tegra_xusb_pad_create()
298 padctl->hsic = pad; in tegra_xusb_pad_create()
903 static int tegra_xusb_hsic_port_parse_dt(struct tegra_xusb_hsic_port *hsic) in tegra_xusb_hsic_port_parse_dt() argument
912 struct tegra_xusb_hsic_port *hsic; in tegra_xusb_add_hsic_port() local
916 np = tegra_xusb_find_port_node(padctl, "hsic", index); in tegra_xusb_add_hsic_port()
920 hsic = kzalloc(sizeof(*hsic), GFP_KERNEL); in tegra_xusb_add_hsic_port()
921 if (!hsic) { in tegra_xusb_add_hsic_port()
926 err = tegra_xusb_port_init(&hsic->base, padctl, np, "hsic", index); in tegra_xusb_add_hsic_port()
930 hsic->base.ops = padctl->soc->ports.hsic.ops; in tegra_xusb_add_hsic_port()
932 hsic->base.lane = hsic->base.ops->map(&hsic->base); in tegra_xusb_add_hsic_port()
[all …]
H A Dxusb-tegra210.c1604 /* save state, HSIC always comes up as HS */ in tegra210_pmc_hsic_enable_phy_sleepwalk()
1625 * stages of sleepwalk. Maintain a HSIC IDLE and keep driving HSIC in tegra210_pmc_hsic_enable_phy_sleepwalk()
2248 TEGRA210_LANE("hsic-0", 0x004, 14, 0x1, hsic),
2255 struct tegra_xusb_hsic_lane *hsic; in tegra210_hsic_lane_probe() local
2258 hsic = kzalloc(sizeof(*hsic), GFP_KERNEL); in tegra210_hsic_lane_probe()
2259 if (!hsic) in tegra210_hsic_lane_probe()
2262 INIT_LIST_HEAD(&hsic->base.list); in tegra210_hsic_lane_probe()
2263 hsic->base.soc = &pad->soc->lanes[index]; in tegra210_hsic_lane_probe()
2264 hsic->base.index = index; in tegra210_hsic_lane_probe()
2265 hsic->base.pad = pad; in tegra210_hsic_lane_probe()
[all …]
/linux/Documentation/devicetree/bindings/mfd/
H A Domap-usb-host.txt20 "ehci-hsic",
51 * "usb_host_hs_hsic480m_p1_clk" - Port 1 480MHz HSIC clock gate.
52 * "usb_host_hs_hsic480m_p2_clk" - Port 2 480MHz HSIC clock gate.
53 * "usb_host_hs_hsic480m_p3_clk" - Port 3 480MHz HSIC clock gate.
54 * "usb_host_hs_hsic60m_p1_clk" - Port 1 60MHz HSIC clock gate.
55 * "usb_host_hs_hsic60m_p2_clk" - Port 2 60MHz HSIC clock gate.
56 * "usb_host_hs_hsic60m_p3_clk" - Port 3 60MHz HSIC clock gate.
/linux/drivers/phy/marvell/
H A Dphy-pxa-28nm-hsic.c80 dev_err(&pdev->dev, "HSIC PHY PLL not locked after 100mS."); in mv_hsic_phy_init()
98 reg |= PHY_28NM_HSIC_S2H_HSIC_EN; /* Enable HSIC PHY */ in mv_hsic_phy_power_on()
114 dev_warn(&pdev->dev, "HSIC PHY READY not set after 100mS."); in mv_hsic_phy_power_on()
118 /* Waiting for HSIC connect int*/ in mv_hsic_phy_power_on()
122 dev_warn(&pdev->dev, "HSIC wait for connect interrupt timeout."); in mv_hsic_phy_power_on()
193 { .compatible = "marvell,pxa1928-hsic-phy", },
201 .name = "mv-hsic-phy",
208 MODULE_DESCRIPTION("Marvell HSIC phy driver");
H A DKconfig85 tristate "Marvell USB HSIC 28nm PHY Driver"
89 Enable this to support Marvell USB HSIC PHY driver for Marvell
129 tristate "Marvell MMP3 USB HSIC PHY Driver"
133 Enable this to support Marvell MMP3 USB HSIC PHY driver for
135 driver to initialize the interface to internal USB HSIC
H A Dphy-mmp3-hsic.c36 { .compatible = "marvell,mmp3-hsic-phy", },
71 .name = "mmp3-hsic-phy",
78 MODULE_DESCRIPTION("Marvell MMP3 USB HSIC PHY Driver");
H A DMakefile6 obj-$(CONFIG_PHY_MMP3_HSIC) += phy-mmp3-hsic.o
13 obj-$(CONFIG_PHY_PXA_28NM_HSIC) += phy-pxa-28nm-hsic.o
/linux/drivers/phy/qualcomm/
H A Dphy-qcom-usb-hsic.c55 /* Configure pins for HSIC functionality */ in qcom_usb_hsic_phy_power_on()
66 /* Enable HSIC mode in HSIC_CFG register */ in qcom_usb_hsic_phy_power_on()
143 { .compatible = "qcom,usb-hsic-phy", },
157 MODULE_DESCRIPTION("Qualcomm USB HSIC phy");
/linux/drivers/usb/chipidea/
H A Dusbmisc_imx.c81 /* HSIC enable */
83 /* Force HSIC module 480M clock on, even when in Host is in suspend mode */
453 /* For HSIC controller */ in usbmisc_imx6q_init()
454 if (data->hsic) { in usbmisc_imx6q_init()
482 * the first two USB controllers are non-HSIC controllers. in usbmisc_imx6_hsic_get_reg_offset()
570 /* For HSIC controller */ in usbmisc_imx6sx_init()
571 if (data->hsic) { in usbmisc_imx6sx_init()
657 if (!data->hsic) { in usbmisc_imx7d_init()
897 if (data->hsic) in usbmisc_imx7d_vbus_comparator_on()
952 if (data->hsic) { in usbmisc_imx7ulp_init()
[all …]
H A Dci_hdrc_msm.c44 bool hsic; member
113 if (!msm_ci->hsic) in ci_hdrc_msm_notify_event()
248 ci->hsic = of_device_is_compatible(phy_node, "qcom,usb-hsic-phy"); in ci_hdrc_msm_probe()
H A Dci_hdrc_imx.h24 unsigned int hsic:1; /* HSIC controller */ member
/linux/drivers/clk/sunxi-ng/
H A Dccu-sun9i-a80-usb.c32 static SUNXI_CCU_GATE_DATA(usb1_hsic_clk, "usb1-hsic", clk_parent_hosc, 0x4, BIT(2), 0);
34 static SUNXI_CCU_GATE_DATA(usb2_hsic_clk, "usb2-hsic", clk_parent_hosc, 0x4, BIT(4), 0);
36 static SUNXI_CCU_GATE_DATA(usb_hsic_clk, "usb-hsic", clk_parent_hosc, 0x4, BIT(10), 0);
/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra-xusb.c717 PINCTRL_PIN(PIN_HSIC_0, "hsic-0"),
718 PINCTRL_PIN(PIN_HSIC_1, "hsic-1"),
732 "hsic-0",
733 "hsic-1",
741 "hsic-0",
742 "hsic-1",
843 TEGRA124_LANE("hsic-0", 0x004, 14, 0x1, 0, usb),
844 TEGRA124_LANE("hsic-1", 0x004, 15, 0x1, 0, usb),
/linux/Documentation/devicetree/bindings/usb/
H A Dusb.yaml40 serial is specified and High-Speed Inter-Chip feature if HSIC is
44 enum: [utmi, utmi_wide, ulpi, serial, hsic]
/linux/drivers/gpu/drm/bridge/
H A Dsil-sii8620.h338 /* HSIC RX Control3, default value: 0x07 */
345 /* HSIC RX INT Registers */
417 /* HSIC TX CRTL, default value: 0x00 */
425 /* HSIC TX INT Low, default value: 0x00 */
428 /* HSIC TX INT High, default value: 0x00 */
431 /* HSIC Keeper, default value: 0x00 */
437 /* HSIC Flow Control General, default value: 0x02 */
442 /* HSIC Flow Control CTR13, default value: 0xfc */
445 /* HSIC Flow Control CTR14, default value: 0xff */
448 /* HSIC Flow Control CTR15, default value: 0xff */
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,msm8974-pinctrl.yaml87 tsif1, tsif2, hsic, grfc, audio_ref_clk, qua_mi2s, pri_mi2s,
162 hsic-state {

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