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/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dnvidia,tegra124-xusb-padctl.txt11 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
12 super-speed USB. Other lanes are for various types of low-speed, full-speed
13 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
14 contains a software-configurable mux that sits between the I/O controller
17 In addition to per-lane configuration, USB 3.0 ports may require additional
18 settings on a per-board basis.
20 Pads will be represented as children of the top-level XUSB pad controller
23 PHY bindings, as described by the phy-bindings.txt file in this directory.
34 --------------------
35 - compatible: Must be:
[all …]
H A Dqcom,usb-hsic-phy.txt1 Qualcomm's USB HSIC PHY
5 - compatible:
8 Definition: Should contain "qcom,usb-hsic-phy" and more specifically one of the
11 "qcom,usb-hsic-phy-mdm9615"
12 "qcom,usb-hsic-phy-msm8974"
14 - #phy-cells:
19 - clocks:
21 Value type: <prop-encoded-array>
25 - clock-names:
30 - pinctrl-names:
[all …]
H A Dallwinner,sun9i-a80-usb-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/allwinner,sun9i-a80-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#phy-cells":
18 const: allwinner,sun9i-a80-usb-phy
21 maxItems: 1
25 - maxItems: 1
[all …]
H A Dqcom,usb-hsic-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,usb-hsic-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm USB HSIC PHY Controller
10 - Bjorn Andersson <andersson@kernel.org>
11 - Vinod Koul <vkoul@kernel.org>
16 - enum:
17 - qcom,usb-hsic-phy-mdm9615
18 - qcom,usb-hsic-phy-msm8974
[all …]
H A Dmarvell,mmp3-hsic-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/phy/marvell,mmp3-hsic-phy.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Marvell MMP3 HSIC PHY
11 - Lubomir Rintel <lkundrak@v3.sk>
15 const: marvell,mmp3-hsic-phy
18 maxItems: 1
21 "#phy-cells":
25 - compatible
[all …]
H A Dnvidia,tegra186-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
H A Dnvidia,tegra124-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra124-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
H A Dnvidia,tegra210-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra210-xus
[all...]
H A Dallwinner,sun8i-a83t-usb-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/allwinner,sun8i-a83t-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#phy-cells":
15 const: 1
18 const: allwinner,sun8i-a83t-usb-phy
22 - description: PHY Control registers
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Domap-usb-host.txt5 - compatible: should be "ti,usbhs-host"
6 - reg: should contain one register range i.e. start and length
7 - ti,hwmods: must contain "usb_host_hs"
11 - num-ports: number of USB ports. Usually this is automatically detected
15 - portN-mode: String specifying the port mode for port N, where N can be
16 from 1 to 3. If the port mode is not specified, that port is treated
18 "ehci-phy",
19 "ehci-tll",
20 "ehci-hsic",
21 "ohci-phy-6pin-datse0",
[all …]
/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Dnvidia,tegra124-xusb.txt8 --------------------
9 - compatible: Must be:
10 - Tegra124: "nvidia,tegra124-xusb"
11 - Tegra132: "nvidia,tegra132-xusb", "nvidia,tegra124-xusb"
12 - Tegra210: "nvidia,tegra210-xusb"
13 - Tegra186: "nvidia,tegra186-xusb"
14 - reg: Must contain the base and length of the xHCI host registers, XUSB FPCI
16 - reg-names: Must contain the following entries:
17 - "hcd"
18 - "fpci"
[all …]
H A Dci-hdrc-usb2.txt4 - compatible: should be one of:
5 "fsl,imx23-usb"
6 "fsl,imx27-usb"
7 "fsl,imx28-usb"
8 "fsl,imx6q-usb"
9 "fsl,imx6sl-usb"
10 "fsl,imx6sx-usb"
11 "fsl,imx6ul-usb"
12 "fsl,imx7d-usb"
13 "fsl,imx7ulp-usb"
[all …]
H A Dusb.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
22 phy-names:
26 usb-phy:
27 $ref: /schemas/types.yaml#/definitions/phandle-array
29 maxItems: 1
38 UTMI+ PHY with an 8- or 16-bit interface if UTMI+ is selected, UTMI+ low
40 serial is specified and High-Speed Inter-Chip feature if HSIC is
[all …]
H A Dchipidea,usb2-imx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/chipidea,usb2-imx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xu Yang <xu.yang_2@nxp.com>
15 - enum:
16 - fsl,imx27-usb
17 - items:
18 - enum:
19 - fsl,imx23-usb
[all …]
H A Dnvidia,tegra124-xusb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/nvidia,tegra124-xusb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
20 - description: NVIDIA Tegra124
21 const: nvidia,tegra124-xusb
23 - description: NVIDIA Tegra132
25 - const: nvidia,tegra132-xusb
[all …]
/freebsd/sys/contrib/device-tree/Bindings/soc/tegra/
H A Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
19 - nvidia,tegra124-pmc
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dqcom,msm8974-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8974-pinctr
[all...]
H A Dnvidia,tegra124-xusb-padctl.txt7 needed for USB. For the new binding, see ../phy/nvidia,tegra-xusb-padctl.txt.
14 This document defines the device-specific binding for the XUSB pad controller.
16 Refer to pinctrl-bindings.txt in this directory for generic information about
17 pin controller device tree bindings and ../phy/phy-bindings.txt for details on
21 --------------------
22 - compatible: For Tegra124, must contain "nvidia,tegra124-xusb-padctl".
23 Otherwise, must contain '"nvidia,<chip>-xusb-padctl",
24 "nvidia-tegra124-xusb-padctl"', where <chip> is tegra132 or tegra210.
25 - reg: Physical base address and length of the controller's registers.
26 - resets: Must contain an entry for each entry in reset-names.
[all …]
/freebsd/sys/arm/ti/omap4/
H A Domap4_prcm_clks.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
11 * 1. Redistributions of source code must retain the above copyright
61 * - There is a top level omap_prcm module that defines all OMAP SoC drivers
65 * configuring the clock - this file is the 'donkey' for OMAP44xx devices.
67 * - The key bit in this file is the omap_clk_devmap array, it's
71 * - In essence you just need to define some callbacks for each of the
74 * - The other thing that is worth noting is that when the omap_prcm device
92 #define PRM_INSTANCE 1
166 {"ti,omap4-cm1", (uintptr_t)CM1_INSTANCE},
[all …]
/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Dmmp3.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/marvell,mmp2.h>
7 #include <dt-bindings/power/marvell,mmp2.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
17 enable-method = "marvell,mmp3-smp";
22 next-level-cache = <&l2>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/allwinner/
H A Dsun9i-a80-optimus.dts2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
46 #include "sun9i-a80.dtsi"
48 #include <dt-bindings/gpio/gpio.h>
52 compatible = "merrii,a80-optimus", "allwinner,sun9i-a80";
60 stdout-path = "serial0:115200n8";
64 compatible = "gpio-leds";
69 gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8-apalis-v1.1.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 #include <dt-bindings/pwm/pwm.h>
10 stdout-path = &lpuart1;
15 compatible = "pwm-backlight";
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_gpio_bkl_on>;
18 brightness-levels = <0 45 63 88 119 158 203 255>;
19 default-brightness-level = <4>;
20 enable-gpios = <&lsio_gpio1 4 GPIO_ACTIVE_HIGH>; /* Apalis BKL1_ON */
21 /* TODO: hook-up to Apalis BKL1_PWM */
[all …]
/freebsd/sys/arm/nvidia/tegra124/
H A Dtegra124_xusbpadctl.c1 /*-
8 * 1. Redistributions of source code must retain the above copyright
49 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
65 #define USB2_PORT_CAP_ULPI_PORT_INTERNAL (1 << 25)
66 #define USB2_PORT_CAP_ULPI_PORT_CAP (1 << 24)
67 #define USB2_PORT_CAP_PORT_REVERSE_ID(p) (1 << (3 + (p) * 4))
68 #define USB2_PORT_CAP_PORT_INTERNAL(p) (1 << (2 + (p) * 4))
76 #define SS_PORT_MAP_PORT_INTERNAL(p) (1 << (3 + (p) * 4))
80 #define ELPG_PROGRAM_AUX_MUX_LP0_VCORE_DOWN (1 << 26)
81 #define ELPG_PROGRAM_AUX_MUX_LP0_CLAMP_EN_EARLY (1 << 25)
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Domap5-cm-t54.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Support for CompuLab CM-T54
5 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 model = "CompuLab CM-T54";
13 compatible = "compulab,omap5-cm-t54", "ti,omap5";
26 vmmcsd_fixed: fixed-regulator-mmcsd {
27 compatible = "regulator-fixed";
28 regulator-name = "vmmcsd_fixed";
[all …]
H A Domap5-board-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gi
[all...]

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