Searched +full:hip06 +full:- +full:lpc (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/arm/hisilicon/low-pin-count.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Hisilicon HiP06 Low Pin Count device10 - Wei Xu <xuwei5@hisilicon.com>13 Hisilicon HiP06 SoCs implement a Low Pin Count (LPC) controller, which15 HiP06 is based on arm64 architecture where there is no I/O space. So, the17 LPC device node.21 pattern: '^isa@[0-9a-f]+$'[all …]
1 // SPDX-License-Identifier: GPL-2.0-only8 #include <dt-bindings/interrupt-controller/arm-gic.h>11 compatible = "hisilicon,hip06-d03";12 interrupt-parent = <&gic>;13 #address-cells = <2>;14 #size-cells = <2>;17 compatible = "arm,psci-0.2";22 #address-cells = <1>;23 #size-cells = <0>;25 cpu-map {[all …]
1 // SPDX-License-Identifier: GPL-2.0-only8 #include <dt-bindings/interrupt-controller/arm-gic.h>11 compatible = "hisilicon,hip07-d05";12 interrupt-parent = <&gic>;13 #address-cells = <2>;14 #size-cells = <2>;17 compatible = "arm,psci-0.2";22 #address-cells = <1>;23 #size-cells = <0>;25 cpu-map {[all …]