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/linux/drivers/gpu/drm/msm/registers/adreno/
H A Dadreno_pm4.xml1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
10 <value name="PS_DEALLOC" value="1" variants="A2XX-A6XX"/>
14 Flushes dirty data from UCHE, and also writes a GPU timestamp to
19 <value name="CACHE_FLUSH" value="6" variants="A2XX-A4XX"/>
21 <value name="HLSQ_FLUSH" value="7" variants="A3XX-A4XX"/>
27 <!-- Not sure that these 4 events don't have the same meaning as on A5XX+ -->
28 <value name="RST_PIX_CNT" value="13" variants="A2XX-A4XX"/>
29 <value name="RST_VTX_CNT" value="14" variants="A2XX-A4XX"/>
[all …]
H A Da3xx.xml1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
11 <value name="TILE_4X4" value="1"/> <!-- "normal" case for textures -->
12 <value name="TILE_32X32" value="2"/> <!-- only used in GMEM -->
13 <value name="TILE_4X2" value="3"/> <!-- only used for CrCb -->
60 <!-- seems to be no NORM variants for 32bit.. -->
106 <!--
107 The NV12 tiled/linear formats seem to require gang'd sampler
111 -->
[all …]
H A Da6xx.xml1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
9 <!--
12 - "cmd" - the register is used outside of renderpass and blits,
13 roughly corresponds to registers used in ib1 for Freedreno
14 - "rp_blit" - the register is used inside renderpass or blits
21 -->
23 <!-- these might be same as a5xx -->
39 <value value="0x0c" name="FMT6_1_5_5_5_UNORM"/> <!-- read only -->
[all …]
H A Da4xx.xml1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
70 <!-- hmm, shifted one compared to a3xx?!? -->
88 <!-- beyond here it does not appear to be shifted -->
145 <!-- 0x00 .. 0x02 -->
147 <!-- 8-bit formats -->
154 <!-- 16-bit formats -->
157 <!-- 0x0a -->
160 <!-- 0x0c -->
[all …]
H A Da5xx.xml1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
32 <value value="0x37" name="RB5_R10G10B10A2_UNORM"/> <!-- GL_RGB10_A2 -->
33 <value value="0x3a" name="RB5_R10G10B10A2_UINT"/> <!-- GL_RGB10_A2UI -->
34 <value value="0x42" name="RB5_R11G11B10_FLOAT"/> <!-- GL_R11F_G11F_B10F -->
251 <value value="8" name="BLIT_ZS"/> <!-- depth or combined depth+stencil -->
252 <value value="9" name="BLIT_S"/> <!-- separate stencil -->
255 <!-- see comment in a4xx.xml about script to extract countables from test-perf output -->
851 <!-- CP Interrupt bits -->
[all …]
/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_ptp.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
5 #include <linux/posix-clock.h>
9 /* The XL710 timesync is very much like Intel's 82599 design when it comes to
39 CANT_DO_PINS = -1,
52 end = -2,
66 led_end = -2,
67 low = 0, enumerator
68 high, enumerator
83 {off, off, off, high, high, high, high},
[all …]
/linux/Documentation/arch/arm64/
H A Dkdump.rst7 Kdump mechanism is used to capture a corrupted kernel vmcore so that
8 it can be subsequently analyzed. In order to do this, a preliminarily
9 reserved memory is needed to pre-load the kdump kernel and boot such
12 That reserved memory for kdump is adapted to be able to minimally
21 large chunk of memomy can be found. The low memory reservation needs to
22 be considered if the crashkernel is reserved from the high memory area.
24 - crashkernel=size@offset
25 - crashkernel=size
26 - crashkernel=size,high crashkernel=size,low
28 Low memory and high memory
[all …]
/linux/arch/x86/include/asm/
H A Dmsr.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include "msr-index.h"
40 * both i386 and x86_64 returns 64-bit value in edx:eax, but gcc's "A"
46 /* Using 64-bit values saves one instruction clearing the high half of low */
47 #define DECLARE_ARGS(val, low, high) unsigned long low, high argument
48 #define EAX_EDX_VAL(val, low, high) ((low) | (high) << 32) argument
49 #define EAX_EDX_RET(val, low, high) "=a" (low), "=d" (high) argument
51 #define DECLARE_ARGS(val, low, high) unsigned long long val argument
52 #define EAX_EDX_VAL(val, low, high) (val) argument
53 #define EAX_EDX_RET(val, low, high) "=A" (val) argument
[all …]
/linux/drivers/net/ethernet/sfc/falcon/
H A Dbitfield.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2006-2013 Solarflare Communications Inc.
14 * Efx NICs make extensive use of bitfields up to 128 bits
15 * wide. Since there is no native 128-bit datatype on most systems,
16 * and since 64-bit datatypes are inefficient on 32-bit systems and
20 * The NICs are PCI devices and therefore little-endian. Since most
21 * of the quantities that we deal with are DMAed to/from host memory,
23 * ef4_dword_t) to be little-endian.
46 /* Low bit number of the specified field */
[all …]
/linux/drivers/net/ethernet/sfc/
H A Dbitfield.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2006-2013 Solarflare Communications Inc.
14 * Efx NICs make extensive use of bitfields up to 128 bits
15 * wide. Since there is no native 128-bit datatype on most systems,
16 * and since 64-bit datatypes are inefficient on 32-bit systems and
20 * The NICs are PCI devices and therefore little-endian. Since most
21 * of the quantities that we deal with are DMAed to/from host memory,
23 * efx_dword_t) to be little-endian.
48 /* Low bit number of the specified field */
[all …]
/linux/drivers/net/ethernet/sfc/siena/
H A Dbitfield.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2006-2013 Solarflare Communications Inc.
14 * Efx NICs make extensive use of bitfields up to 128 bits
15 * wide. Since there is no native 128-bit datatype on most systems,
16 * and since 64-bit datatypes are inefficient on 32-bit systems and
20 * The NICs are PCI devices and therefore little-endian. Since most
21 * of the quantities that we deal with are DMAed to/from host memory,
23 * efx_dword_t) to be little-endian.
46 /* Low bit number of the specified field */
[all …]
/linux/Documentation/userspace-api/media/v4l/
H A Dpixfmt-z16.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-Z16:
10 16-bit depth data with distance values at each pixel
16 This is a 16-bit format, representing depth data. Each pixel is a
17 distance to the respective point in the image coordinates. Distance unit
18 can vary and has to be negotiated with the device separately. Each pixel
19 is stored in a 16-bit word in the little endian byte order.
27 .. flat-table::
28 :header-rows: 0
29 :stub-columns: 0
[all …]
H A Dpixfmt-srggb10-ipu3.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-pix-fmt-ipu3-sbggr10:
4 .. _v4l2-pix-fmt-ipu3-sgbrg10:
5 .. _v4l2-pix-fmt-ipu3-sgrbg10:
6 .. _v4l2-pix-fmt-ipu3-srggb10:
13 10-bit Bayer formats
21 to 32 bytes leaving 6 most significant bits padding in the last byte.
24 In other respects this format is similar to :ref:`V4L2-PIX-FMT-SRGGB10`.
36 .. flat-table::
38 * - start + 0:
[all …]
H A Dpixfmt-tch-tu16.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-TCH-FMT-TU16:
11 16-bit unsigned little endian raw touch data
17 This format represents unsigned 16-bit data from a touch controller.
20 0 to 65535.
26 .. flat-table::
27 :header-rows: 0
28 :stub-columns: 0
31 * - start + 0:
32 - R'\ :sub:`00low`
[all …]
H A Dpixfmt-tch-td16.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-TCH-FMT-DELTA-TD16:
11 16-bit signed little endian Touch Delta
19 Delta values may range from -32768 to 32767. Typically the values will vary
27 .. flat-table::
28 :header-rows: 0
29 :stub-columns: 0
32 * - start + 0:
33 - D'\ :sub:`00low`
34 - D'\ :sub:`00high`
[all …]
H A Dpixfmt-srggb10.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-SRGGB10:
4 .. _v4l2-pix-fmt-sbggr10:
5 .. _v4l2-pix-fmt-sgbrg10:
6 .. _v4l2-pix-fmt-sgrbg10:
16 10-bit Bayer formats expanded to 16 bits
23 sample. Each sample is stored in a 16-bit word, with 6 unused
24 high bits filled with zeros. Each n-pixel row contains n/2 green samples and
31 Each cell is one byte, the 6 most significant bits in the high bytes
37 .. flat-table::
[all …]
/linux/drivers/net/ethernet/engleder/
H A Dtsnep_ptp.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (C) 2021 Gerhard Engleder <gerhard@engleder-embedded.com> */
9 u32 low; in tsnep_get_system_time() local
10 u32 high; in tsnep_get_system_time() local
12 /* read high dword twice to detect overrun */ in tsnep_get_system_time()
13 high = ioread32(adapter->addr + ECM_SYSTEM_TIME_HIGH); in tsnep_get_system_time()
15 low = ioread32(adapter->addr + ECM_SYSTEM_TIME_LOW); in tsnep_get_system_time()
16 high_before = high; in tsnep_get_system_time()
17 high = ioread32(adapter->addr + ECM_SYSTEM_TIME_HIGH); in tsnep_get_system_time()
18 } while (high != high_before); in tsnep_get_system_time()
[all …]
/linux/arch/arm64/kvm/
H A Dstacktrace.c1 /* SPDX-License-Identifier: GPL-2.0-only */
7 * 1) Non-protected nVHE mode - the host can directly access the
9 * to allocate shared buffers for the host to read the unwinded
12 * 2) pKVM (protected nVHE) mode - the host cannot directly access
13 * the HYP memory. The stack is unwinded in EL2 and dumped to a shared
28 unsigned long low = (unsigned long)stacktrace_info->overflow_stack_base; in stackinfo_get_overflow() local
29 unsigned long high = low + OVERFLOW_STACK_SIZE; in stackinfo_get_overflow() local
32 .low = low, in stackinfo_get_overflow()
33 .high = high, in stackinfo_get_overflow()
39 unsigned long low = (unsigned long)this_cpu_ptr_nvhe_sym(overflow_stack); in stackinfo_get_overflow_kern_va() local
[all …]
/linux/include/media/
H A Dcec-pin.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * cec-pin.h - low-level CEC pin control
15 * struct cec_pin_ops - low-level CEC pin operations
16 * @read: read the CEC pin. Returns > 0 if high, 0 if low, or an error
18 * @low: drive the CEC pin low.
19 * @high: stop driving the CEC pin. The pull-up will drive the pin
20 * high, unless someone else is driving the pin low.
21 * @enable_irq: optional, enable the interrupt to detect pin voltage changes.
26 * @read_hpd: optional. Read the HPD pin. Returns > 0 if high, 0 if low or
28 * @read_5v: optional. Read the 5V pin. Returns > 0 if high, 0 if low or
[all …]
/linux/Documentation/hwmon/
H A Dadm9240.rst10 Addresses scanned: I2C 0x2c - 0x2f
20 Addresses scanned: I2C 0x2c - 0x2f
24 http://pdfserv.maxim-ic.com/en/ds/DS1780.pdf
30 Addresses scanned: I2C 0x2c - 0x2f
37 - Frodo Looijaard <frodol@dds.nl>,
38 - Philip Edelbrock <phil@netroedge.com>,
39 - Michiel Rook <michiel@grendelproject.nl>,
40 - Grant Coady <gcoady.lk@gmail.com> with guidance
44 ---------
46 chip MSB 5-bit address. Each chip reports a unique manufacturer
[all …]
/linux/Documentation/driver-api/gpio/
H A Dintro.rst9 The documents in this directory give detailed instructions on how to access
10 GPIOs in drivers, and how to write a driver for a device that provides GPIOs
17 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
19 to Linux developers working with embedded and custom hardware. Each GPIO
20 represents a bit connected to a particular pin, or "ball" on Ball Grid Array
21 (BGA) packages. Board schematics show which external hardware connects to
23 passes such pin configuration data to drivers.
25 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
26 non-dedicated pin can be configured as a GPIO; and most chips have at least
29 often have a few such pins to help with pin scarcity on SOCs; and there are
[all …]
/linux/include/linux/
H A Dmath64.h1 /* SPDX-License-Identifier: GPL-2.0 */
16 * div_u64_rem - unsigned 64bit divide with 32bit divisor with remainder
19 * @remainder: pointer to unsigned 32bit remainder
23 * This is commonly provided by 32bit archs to provide an optimized 64bit
33 * div_s64_rem - signed 64bit divide with 32bit divisor with remainder
36 * @remainder: pointer to signed 32bit remainder
47 * div64_u64_rem - unsigned 64bit divide with 64bit divisor and remainder
50 * @remainder: pointer to unsigned 64bit remainder
61 * div64_u64 - unsigned 64bit divide with 64bit divisor
73 * div64_s64 - signed 64bit divide with 64bit divisor
[all …]
/linux/drivers/thermal/intel/
H A Dintel_tcc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * intel_tcc.c - Library for Intel TCC (thermal control circuitry) MSR access
10 #include <asm/intel-family.h>
14 * struct temp_masks - Bitmasks for temperature readings
19 * Bitmasks to extract the fields of the MSR_TEMPERATURE and IA32_[PACKAGE]_
129 memcpy(&intel_tcc_temp_masks, (const void *)id->driver_data, in intel_tcc_init()
135 * Use subsys_initcall to ensure temperature bitmasks are initialized before
141 * intel_tcc_get_offset_mask() - Returns the bitmask to read TCC offset
143 * Get the model-specific bitmask to extract TCC_OFFSET from the MSR
147 * Return: The model-specific bitmask for TCC offset.
[all …]
/linux/drivers/gpu/drm/msm/registers/display/
H A Dmdp4.xml1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
27 <!--
40 written to hw (mdp4_display_intf_sel() remaps the last two
41 values to MDDI_LCDC_INTF/MDDI_INTF with extra bits set).. so
43 -->
44 <value name="INTF_LCDC_DTV" value="0"/> <!-- LCDC RGB or DTV (external) -->
47 <value name="INTF_EBI2_TV" value="3"/> <!-- EBI2 or TV (external) -->
65 <brief>appears to map pipe to mixer stage</brief>
[all …]
/linux/drivers/gpu/drm/panfrost/
H A Dpanfrost_regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * (C) COPYRIGHT 2010-2018 ARM Limited. All rights reserved.
93 #define GPU_SHADER_PRESENT_LO 0x100 /* (RO) Shader core present bitmap, low word */
94 #define GPU_SHADER_PRESENT_HI 0x104 /* (RO) Shader core present bitmap, high word */
95 #define GPU_TILER_PRESENT_LO 0x110 /* (RO) Tiler core present bitmap, low word */
96 #define GPU_TILER_PRESENT_HI 0x114 /* (RO) Tiler core present bitmap, high word */
98 #define GPU_L2_PRESENT_LO 0x120 /* (RO) Level 2 cache present bitmap, low word */
99 #define GPU_L2_PRESENT_HI 0x124 /* (RO) Level 2 cache present bitmap, high word */
105 #define GPU_STACK_PRESENT_LO 0xE00 /* (RO) Core stack present bitmap, low word */
106 #define GPU_STACK_PRESENT_HI 0xE04 /* (RO) Core stack present bitmap, high word */
[all …]

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